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165 Publications
2010 | Conference Paper | LibreCat-ID: 13051
Hunger, Marc, and Sybille Hellebrand. “Ausbeute Und Fehlertoleranz Bei Dreifach Modularer Redundanz.” In 4. GMM/GI/ITG-Fachtagung “Zuverlässigkeit Und Entwurf,” 81–88. Wildbad Kreuth, Germany, 2010.
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2010 | Misc | LibreCat-ID: 13073
Hellebrand, Sybille. Nano-Electronic Systems. Editorial, it 4/2010, pp. 179-180, 2010.
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2010 | Conference Paper | LibreCat-ID: 12983
Hopsch, Fabian, Bernd Becker, Sybille Hellebrand, Ilia Polian, Bernd Straube, Wolfgang Vermeiren, and Hans-Joachim Wunderlich. “Variation-Aware Fault Modeling.” In 19th IEEE Asian Test Symposium (ATS’10), 87–93. Shanghai, China: IEEE, 2010. https://doi.org/10.1109/ats.2010.24.
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2010 | Conference Paper | LibreCat-ID: 12985
Indlekofer, Thomas, Michael Schnittger, and Sybille Hellebrand. “Efficient Test Response Compaction for Robust BIST Using Parity Sequences.” In 28th IEEE International Conference on Computer Design (ICCD’10), 480–85. Amsterdam, The Netherlands: IEEE, 2010. https://doi.org/10.1109/iccd.2010.5647648.
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2010 | Conference Paper | LibreCat-ID: 12986
Hunger, Marc, and Sybille Hellebrand. “The Impact of Manufacturing Defects on the Fault Tolerance of TMR-Systems.” In 25th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT’10), 101–8. Kyoto, Japan: IEEE, 2010. https://doi.org/10.1109/dft.2010.19.
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2010 | Conference Paper | LibreCat-ID: 12988
Froese, Viktor, Rüdiger Ibers, and Sybille Hellebrand. “Reusing NoC-Infrastructure for Test Data Compression.” In 28th IEEE VLSI Test Symposium (VTS’10), 227–31. Santa Cruz, CA, USA: IEEE, 2010. https://doi.org/10.1109/vts.2010.5469570.
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2010 | Conference Paper | LibreCat-ID: 13049
Becker, Bernd, Sybille Hellebrand, Ilia Polian, Bernd Straube, Wolfgang Vermeiren, and Hans-Joachim Wunderlich. “Massive Statistical Process Variations - A Grand Challenge for Testing Nanoelectronic Circuits.” In 4th Workshop on Dependable and Secure Nanocomputing (WDSN’10), (Invited Paper). Chicago, IL, USA, 2010.
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2010 | Conference Paper | LibreCat-ID: 13050
Indlekofer, Thomas, Michael Schnittger, and Sybille Hellebrand. “Robuster Selbsttest Mit Extremer Kompaktierung.” In 4. GMM/GI/ITG-Fachtagung “Zuverlässigkeit Und Entwurf,” 17–24. Wildbad Kreuth, Germany, 2010.
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2009 | Conference Paper | LibreCat-ID: 12991
Hunger, Marc, Sybille Hellebrand, Alejandro Czutro, Ilia Polian, and Bernd Becker. “ATPG-Based Grading of Strong Fault-Secureness.” In 15th IEEE International On-Line Testing Symposium (IOLTS’09. Sesimbra-Lisbon, Portugal: IEEE, 2009. https://doi.org/10.1109/iolts.2009.5196027.
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2009 | Conference Paper | LibreCat-ID: 12990
Hellebrand, Sybille, and Marc Hunger. “Are Robust Circuits Really Robust?” In 24th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT’09), (Invited Talk), 77. Chicago, IL, USA: IEEE, 2009. https://doi.org/10.1109/dft.2009.28.
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2009 | Conference Paper | LibreCat-ID: 13030
Hunger, Marc, Sybille Hellebrand, Alexander Czutro, Ilia Polian, and Bernd Becker. “Robustheitsanalyse Stark Fehlersicherer Schaltungen Mit SAT-Basierter Testmustererzeugung.” In 3. GMM/GI/ITG-Fachtagung “Zuverlässigkeit Und Entwurf.” Stuttgart, Germany, 2009.
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2008 | Misc | LibreCat-ID: 13033
Coym, Torsten, Sybille Hellebrand, Stefan Ludwig, Bernd Straube, Hans-Joachim Wunderlich, and Christian G. Zoellin. Ein Verfeinertes Elektrisches Modell Für Teilchentreffer Und Dessen Auswirkung Auf Die Bewertung Der Schaltungsempfindlichkeit. 20. ITG/GI/GMM Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen” (Poster), Wien, Österreich, 2008.
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2008 | Misc | LibreCat-ID: 13035
Amgalan, Uranmandakh, Christian Hachmann, Sybille Hellebrand, and Hans-Joachim Wunderlich. Testen Mit Rücksetzpunkten - Ein Ansatz Zur Verbesserung Der Ausbeute Bei Robusten Schaltungen. 20. ITG/GI/GMM Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen”, Wien, Österreich, 2008.
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2008 | Conference Paper | LibreCat-ID: 12992
Oehler, Philipp, Alberto Bosio, Giorgio di Natale, and Sybille Hellebrand. “A Modular Memory BIST for Optimized Memory Repair.” In 14th IEEE International On-Line Testing Symposium (IOLTS’08), (Poster). Rhodos, Greece: IEEE, 2008. https://doi.org/10.1109/iolts.2008.30.
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2008 | Conference Paper | LibreCat-ID: 12994
Amgalan, Uranmandakh, Christian Hachmann, Sybille Hellebrand, and Hans-Joachim Wunderlich. “Signature Rollback - A Technique for Testing Robust Circuits.” In 26th IEEE VLSI Test Symposium (VTS’08), 125–30. San Diego, CA, USA: IEEE, 2008. https://doi.org/10.1109/vts.2008.34.
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2008 | Conference Paper | LibreCat-ID: 12993
Hunger, Marc, and Sybille Hellebrand. “Verification and Analysis of Self-Checking Properties through ATPG.” In 14th IEEE International On-Line Testing Symposium (IOLTS’08). Rhodos, Greece: IEEE, 2008. https://doi.org/10.1109/iolts.2008.32.
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2008 | Conference Paper | LibreCat-ID: 13031
Hunger, Marc, and Sybille Hellebrand. “Analyse Selbstprüfender Schaltungen – Nachweis von Fehlersicherheit Und Selbsttestbarkeit Mit ATPG.” In 2. GMM/GI/ITG-Fachtagung “Zuverlässigkeit Und Entwurf.” Ingolstadt, Germany, 2008.
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2008 | Conference Paper | LibreCat-ID: 13032
Oehler, Philipp, Alberto Bosio, Giorgio Di Natale, and Sybille Hellebrand. “Modularer Selbsttest Und Optimierte Reparaturanalyse.” In 2. GMM/GI/ITG-Fachtagung “Zuverlässigkeit Und Entwurf.” Ingolstadt, Germany, 2008.
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2007 | Misc | LibreCat-ID: 13038
Hellebrand, Sybille. Reliable Nanoscale Systems - Challenges and Strategies for On- and Offline Testing. 5th IEEE East-West Design \& Test Symposium, Yerevan, Armenia (Invited Talk), 2007.
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2007 | Misc | LibreCat-ID: 13039
Ali, Muhammad, Michael Welzl, Sven Hessler, and Sybille Hellebrand. An End-to-End Reliability Protocol to Address Transient Faults in Network on Chips. DATE 2007 Friday Workshop on Diagnostic Services in Network-on-Chips, Nice, France, (Poster), 2007.
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2007 | Misc | LibreCat-ID: 13042
Oehler, Philipp, Sybille Hellebrand, and Hans-Joachim Wunderlich. An Integrated Built-in Test and Repair Approach for Memories with 2D Redundancy. 17th GI/ITG/GMM Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen”, Erlangen, Germany, 2007.
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2007 | Misc | LibreCat-ID: 13043
Hellebrand, Sybille. Qualitätssicherung Für Nanochips - Wie IT-Produkte Zuverlässig Werden. ForschungsForum Paderborn, 10. Ausgabe, Paderborn, Germany, 2007.
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2007 | Conference Paper | LibreCat-ID: 12995
Hellebrand, Sybille, Christian G. Zoellin, Hans-Joachim Wunderlich, Stefan Ludwig, Torsten Coym, and Bernd Straube. “A Refined Electrical Model for Particle Strikes and Its Impact on SEU Prediction.” In 22nd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT’07), 50–58. Rome, Italy: IEEE, 2007. https://doi.org/10.1109/dft.2007.43.
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2007 | Conference Paper | LibreCat-ID: 12996
Oehler, Philipp, Sybille Hellebrand, and Hans-Joachim Wunderlich. “Analyzing Test and Repair Times for 2D Integrated Memory Built-in Test and Repair.” In 10th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems (DDECS’07), 185–90. Krakow, Poland: IEEE, 2007. https://doi.org/10.1109/ddecs.2007.4295278.
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2007 | Conference Paper | LibreCat-ID: 12997
Oehler, Philipp, Sybille Hellebrand, and Hans-Joachim Wunderlich. “An Integrated Built-In Test and Repair Approach for Memories with 2D Redundancy.” In 12th IEEE European Test Symposium (ETS’07), 91–96. Freiburg, Germany: IEEE, 2007. https://doi.org/10.1109/ets.2007.10.
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2007 | Conference Paper | LibreCat-ID: 13037
Hellebrand, Sybille, Christian G. Zoellin, Hans-Joachim Wunderlich, Stefan Ludwig, Torsten Coym, and Bernd Straube. “Testing and Monitoring Nanoscale Systems - Challenges and Strategies for Advanced Quality Assurance.” In 43rd International Conference on Microelectronics, Devices and Material with the Workshop on Electronic Testing (MIDEM’07), (Invited Paper). Bled, Slovenia, 2007.
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2007 | Journal Article | LibreCat-ID: 13036
Hellebrand, Sybille, Christian G. Zoellin, Hans-Joachim Wunderlich, Stefan Ludwig, Torsten Coym, and Bernd Straube. “Testing and Monitoring Nanoscale Systems - Challenges and Strategies for Advanced Quality Assurance.” Informacije MIDEM, Ljubljana (Invited Paper) 37, no. 4 (124) (2007): 212–19.
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2007 | Journal Article | LibreCat-ID: 13044
Ali, Muhammad, Sven Hessler, Michael Welzl, and Sybille Hellebrand. “An Efficient Fault Tolerant Mechanism to Deal with Permanent and Transient Failures in a Network on Chip.” International Journal on High Performance Systems Architecture 1, no. 2 (2007): 113–23.
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2007 | Conference Paper | LibreCat-ID: 13040
Ali, Muhammad, Michael Welzl, Sven Hessler, and Sybille Hellebrand. “A Fault Tolerant Mechanism for Handling Permanent and Transient Failures in a Network on Chip.” In 4th International Conference on Information Technology: New Generations (ITNG’07), 1027–32. Las Vegas, Nevada, USA, 2007.
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2007 | Conference Paper | LibreCat-ID: 13041
Becker, Bernd, Ilia Polian, Sybille Hellebrand, Bernd Straube, and Hans-Joachim Wunderlich. “Test Und Zuverlässigkeit Nanoelektronischer Systeme.” In 1. GMM/GI/ITG-Fachtagung “Zuverlässigkeit Und Entwurf.” Munich, Germany, 2007.
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2006 | Journal Article | LibreCat-ID: 13045
Becker, Bernd, Ilia Polian, Sybille Hellebrand, Bernd Straube, and Hans-Joachim Wunderlich. “DFG-Projekt RealTest - Test Und Zuverlässigkeit Nanoelektronischer Systeme.” It - Information Technology 48, no. 5 (2006): 305–11.
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2005 | Misc | LibreCat-ID: 13046
Oehler, Philipp, and Sybille Hellebrand. A Low Power Design for Embedded DRAMs with Online Consistency Checking. Kleinheubachertagung 2005, Miltenberg, Germany, 2005.
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2005 | Misc | LibreCat-ID: 13101
Ali, Muhammad, Michael Welzl, and Sybille Hellebrand. Dynamic Routing: A Prerequisite for Reliable NoCs. 17th GI/ITG/GMM Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen”, Innsbruck, Austria, 2005.
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2005 | Misc | LibreCat-ID: 13102
Oehler, Philipp, and Sybille Hellebrand. Power Consumption Versus Error Correcting Capabilities in Embedded DRAMs - A Case Study. 17th GI/ITG/GMM Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen”, Innsbruck, Austria, 2005.
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2005 | Conference Paper | LibreCat-ID: 12999
Ali, Muhammad, Michael Welzl, Martin Zwicknagl, and Sybille Hellebrand. “Considerations for Fault-Tolerant Networks on Chips.” In IEEE International Conference on Microelectronics (ICM’05). Islamabad, Pakistan: IEEE, 2005. https://doi.org/10.1109/icm.2005.1590063.
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2005 | Conference Paper | LibreCat-ID: 13000
Oehler, Philipp, and Sybille Hellebrand. “Low Power Embedded DRAMs with High Quality Error Correcting Capabilities.” In 10th IEEE European Test Symposium (ETS’05), 148–53. Tallinn, Estonia: IEEE, 2005. https://doi.org/10.1109/ets.2005.28.
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2005 | Conference Paper | LibreCat-ID: 12998
Ali, Muhammad, Michael Welzl, and Sybille Hellebrand. “A Dynamic Routing Mechanism for Network on Chip.” In 23rd IEEE NORCHIP Conference, 70–73. Oulu, Finland: IEEE, 2005. https://doi.org/10.1109/norchp.2005.1596991.
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2004 | Conference Paper | LibreCat-ID: 13071
Liu Jing, Michelle, Stefan Ruehrup, Christian Schindelhauer, Klaus Volbert, Martin Dierkes, Andreas Bellgardt, Rüdiger Ibers, and Ulrich Hilleringmann. “Sensor Networks with More Features Using Less Hardware.” In {GOR/NGB Conference Tilburg 2004}. Tilburg, Netherlands, 2004.
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2004 | Misc | LibreCat-ID: 13099
Breu, Ruth, Thomas Fahringer, Dieter Fensel, Sybille Hellebrand, Aart Middeldorp, and Otmar Scherzer. Im Westen Viel Neues - Informatik an Der Universität Innsbruck. OCG Journal, pp. 28-29, 2004.
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2004 | Misc | LibreCat-ID: 13100
Hellebrand, Sybille, Armin Wuertenberger, and Christofer S. Tautermann. Data Compression for Multiple Scan Chains Using Dictionaries with Corrections. 9th IEEE European Test Symposium, Ajaccio, Corsica, France, 2004.
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2004 | Conference Paper | LibreCat-ID: 13001
Wuertenberger, Armin, Christofer S. Tautermann, and Sybille Hellebrand. “Data Compression for Multiple Scan Chains Using Dictionaries with Corrections.” In IEEE International Test Conference (ITC’04), 926–35. Charlotte, NC, USA: IEEE, 2004. https://doi.org/10.1109/test.2004.1387357.
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2003 | Misc | LibreCat-ID: 13098
Breu, Ruth, Sybille Hellebrand, and Michael Welzl. Experiences from Teaching Software Development in a Java Environment. Handouts ACS/IEEE Workshop on Practice and Experience with Java in Education, Tunis, Tunisia, 2003.
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2003 | Conference Paper | LibreCat-ID: 13002
Wuertenberger, Armin, Christofer S. Tautermann, and Sybille Hellebrand. “A Hybrid Coding Strategy for Optimized Test Data Compression.” In IEEE International Test Conference (ITC’03), 451–59. Charlotte, NC, USA: IEEE, 2003. https://doi.org/10.1109/test.2003.1270870.
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2002 | Misc | LibreCat-ID: 13097
Hellebrand, Sybille, and Armin Wuertenberger. Alternating Run-Length Coding: A Technique for Improved Test Data Compression. IEEE International Workshop on Test Resource Partitioning, Baltimore, MD, USA, 2002.
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2002 | Journal Article | LibreCat-ID: 13003
Hellebrand, Sybille, Hans-Joachim Wunderlich, Alexander A. Ivaniuk, Yuri V. Klimets, and Vyacheslav N. Yarmolik. “Efficient Online and Offline Testing of Embedded DRAMs.” IEEE Transactions on Computers 51, no. 7 (2002): 801–9. https://doi.org/10.1109/tc.2002.1017700.
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2002 | Journal Article | LibreCat-ID: 13069
Hellebrand, Sybille, Hua-Guo Liang, and Hans-Joachim Wunderlich. “Two-Dimensional Test Data Compression for Scan-Based Deterministic BIST.” Journal of Electronic Testing - Theory and Applications (JETTA) 18, no. 2 (2002): 157–68.
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2002 | Journal Article | LibreCat-ID: 13070
Liang, Huaguo, Sybille Hellebrand, and Hans-Joachim Wunderlich. “A Mixed-Mode BIST Scheme Based on Folding Compression.” Journal on Computer Science and Technology 17, no. 2 (2002): 203–12.
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2001 | Misc | LibreCat-ID: 13096
Liang, Hua-Guo, Sybille Hellebrand, and Hans-Joachim Wunderlich. Two-Dimensional Test Data Compression for Scan-Based Deterministic BIST. IEEE European Test Workshop, Stockholm, Sweden, 2001.
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2001 | Conference Paper | LibreCat-ID: 13004
Liang, Hua-Guo, Sybille Hellebrand, and Hans-Joachim Wunderlich. “Two-Dimensional Test Data Compression for Scan-Based Deterministic BIST.” In IEEE International Test Conference (ITC’01), 894–902. Baltimore, MD, USA: IEEE, 2001. https://doi.org/10.1109/test.2001.966712.
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2001 | Journal Article | LibreCat-ID: 13047
Liang, Hua-Guo, Sybille Hellebrand, and Hans-Joachim Wunderlich. “Deterministic BIST Scheme Based on Reseeding of Folding Counters.” Journal of Computer Research and Development, (Jisuanji Yanjiu Yu Fazhan) 38, no. 8 (2001): 931.
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2001 | Journal Article | LibreCat-ID: 13068
Hellebrand, Sybille, Hua-Guo Liang, and Hans-Joachim Wunderlich. “A Mixed Mode BIST Scheme Based on Reseeding of Folding Counters.” Journal of Electronic Testing - Theory and Applications (JETTA) 17, no. 3/4 (2001): 341–49.
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2000 | Misc | LibreCat-ID: 13094
Hellebrand, Sybille, and Hans-Joachim Wunderlich. Hardwarepraktikum Im Diplomstudiengang Informatik. Handbuch Lehre, Berlin, Raabe Verlag, 2000.
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2000 | Misc | LibreCat-ID: 13095
Hellebrand, Sybille, Hua-Guo Liang, and Hans-Joachim Wunderlich. A Mixed Mode BIST Scheme Based on Reseeding of Folding Counters. IEEE European Test Workshop, Cascais, Portugal, 2000.
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2000 | Conference Paper | LibreCat-ID: 13005
Hellebrand, Sybille, Hua-Guo Liang, and Hans-Joachim Wunderlich. “A Mixed Mode BIST Scheme Based on Reseeding of Folding Counters.” In IEEE International Test Conference (ITC’00), 778–84. Atlantic City, NJ, USA: IEEE, 2000. https://doi.org/10.1109/test.2000.894274.
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1999 | Book | LibreCat-ID: 13065
Hellebrand, Sybille. Selbsttestbare Steuerwerke - Strukturen Und Syntheseverfahren. 10. Verlag Dr. Kovac, Hamburg: Verlag Dr. Kovac, Hamburg, 1999.
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1999 | Misc | LibreCat-ID: 13093
Hellebrand, Sybille, Hans-Joachim Wunderlich, and Vyacheslav N. Yarmolik. Exploiting Symmetries to Speed Up Transparent BIST. 11th GI/ITG/GMM/IEEE Workshop, 1999.
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1999 | Conference Paper | LibreCat-ID: 13006
Hellebrand, Sybille, Hans-Joachim Wunderlich, Alexander A. Ivaniuk, Yuri V. Klimets, and Vyacheslav N. Yarmolik. “Error Detecting Refreshment for Embedded DRAMs.” In 17th IEEE VLSI Test Symposium (VTS’99), 384–90. Dana Point, CA, USA: IEEE, 1999. https://doi.org/10.1109/vtest.1999.766693.
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1999 | Conference Paper | LibreCat-ID: 13066
N. Yarmolik, Vyacheslav, Iuri V. Bykov, Sybille Hellebrand, and Hans-Joachim Wunderlich. “Transparent Word-Oriented Memory BIST Based on Symmetric March Algorithms.” In Third European Dependable Computing Conference (EDCC-3). Prague, Czech Republic, 1999.
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1999 | Conference Paper | LibreCat-ID: 13067
Hellebrand, Sybille, Hans-Joachim Wunderlich, and Vyacheslav N. Yarmolik. “Symmetric Transparent BIST for RAMs.” In Design Automation and Test in Europe (DATE’99), 702–7. Munich, Germany, 1999.
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1998 | Report | LibreCat-ID: 13029
Hellebrand, Sybille, and Hans-Joachim Wunderlich. Test Und Synthese Schneller Eingebetteter Systeme. Universität Stuttgart, 1998.
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1998 | Misc | LibreCat-ID: 13091
N. Yarmolik, Vyacheslav, Sybille Hellebrand, and Hans-Joachim Wunderlich. Efficient Consistency Checking for Embedded Memories. 5th IEEE International Test Synthesis Workshop, Santa Barbara, CA, USA, 1998.
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1998 | Misc | LibreCat-ID: 13092
N. Yarmolik, Vyacheslav, Sybille Hellebrand, and Hans-Joachim Wunderlich. Efficient Consistency Checking for Embedded Memories. 10th GI/ITG/GMM/IEEE Workshop, 1998.
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1998 | Book Chapter | LibreCat-ID: 13060
Hellebrand, Sybille, Hans-Joachim Wunderlich, and Andre Hertwig. “Mixed-Mode BIST Using Embedded Processors.” In Mixed-Mode BIST Using Embedded Processors. 5. In: M. Nicolaidis, Y. Zorian, D. K. Pradhan (Eds.): On-Line Testing for VLSI, Boston: Kluwer Academic Publishers 1998: Kluwer Academic Publishers, 1998.
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1998 | Journal Article | LibreCat-ID: 13061
Hellebrand, Sybille, Hans-Joachim Wunderlich, and Andre Hertwig. “Mixed-Mode BIST Using Embedded Processors.” Journal of Electronic Testing Theory and Applications - JETTA 12, no. 1/2 (1998): 127–38.
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1998 | Journal Article | LibreCat-ID: 13064
Hellebrand, Sybille, Andre Hertwig, and Hans-Joachim Wunderlich. “Synthesis of Fast On-Line Testable Controllers for Data-Dominated Applications.” IEEE Design and Test 15, no. 4 (1998): 36–41.
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1998 | Conference Paper | LibreCat-ID: 13007
Hertwig, Andre, Sybille Hellebrand, and Hans-Joachim Wunderlich. “Fast Self-Recovering Controllers.” In 16th IEEE VLSI Test Symposium (VTS’98), 296–302. Monterey, CA, USA: IEEE, 1998. https://doi.org/10.1109/vtest.1998.670883.
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1998 | Conference Paper | LibreCat-ID: 13008
Hellebrand, Sybille, Hans-Joachim Wunderlich, and Vyacheslav N. Yarmolik. “Self-Adjusting Output Data Compression: An Efficient BIST Technique for RAMs.” In Design Automation and Test in Europe (DATE’98), 173–79. Paris, France, 1998. https://doi.org/10.1109/date.1998.655853.
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1998 | Conference Paper | LibreCat-ID: 13063
N. Yarmolik, Vyacheslav, Yuri V. Klimets, Sybille Hellebrand, and Hans-Joachim Wunderlich. “New Transparent RAM BIST Based on Self-Adjusting Output Data Compression.” In Design & Diagnostics of Electronic Circuits & Systems (DDECS’98), 27–33. Szczyrk, Poland, 1998.
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1997 | Misc | LibreCat-ID: 13089
Tsai, Kun-Han, Sybille Hellebrand, Janusz Rajski, and Malgorzata Marek-Sadowska. STARBIST: Scan Autocorrelated Random Pattern Generation. 4th IEEE International Test Synthesis Workshop, Santa Barbara, CA, USA, 1997.
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1997 | Misc | LibreCat-ID: 13090
Hertwig, Andre, Sybille Hellebrand, and Hans-Joachim Wunderlich. Synthesis of Fast On-Line Testable Controllers for Data-Dominated Applications. 3rd IEEE International On-Line Testing Workshop, Crete, Greece, 1997.
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1997 | Conference Paper | LibreCat-ID: 13009
Tsai, Kun-Han, Sybille Hellebrand, Malgorzata Marek-Sadowska, and Janusz Rajski. “STARBIST: Scan Autocorrelated Random Pattern Generation.” In 34th ACM/IEEE Design Automation Conference (DAC’97). Anaheim, CA, USA: IEEE, 1997. https://doi.org/10.1109/dac.1997.597194.
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1996 | Misc | LibreCat-ID: 13087
Hellebrand, Sybille, and Hans-Joachim Wunderlich. Using Embedded Processors for BIST. 3rd IEEE International Test Synthesis Workshop, Santa Barbara, CA, 1996.
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1996 | Misc | LibreCat-ID: 13088
Hellebrand, Sybille, Hans-Joachim Wunderlich, and Andre Hertwig. Mixed-Mode BIST Using Embedded Processors. 2nd IEEE International On-Line Testing Workshop. Biarritz, France, 1996.
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1996 | Conference Paper | LibreCat-ID: 13010
Hellebrand, Sybille, Hans-Joachim Wunderlich, and Andre Hertwig. “Mixed-Mode BIST Using Embedded Processors.” In IEEE International Test Conference (ITC’96), 195–204. Washington, DC, USA: IEEE, 1996. https://doi.org/10.1109/test.1996.556962.
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1995 | Report | LibreCat-ID: 13026
Hellebrand, Sybille, and Hans-Joachim Wunderlich. Synthesis Procedures for Self-Testable Controllers. University of Siegen, Germany, 1995.
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1995 | Report | LibreCat-ID: 13027
Hellebrand, Sybille, Hans-Joachim Wunderlich, F. Goncalves, and Joao Paulo Teixeira. Evaluation of Self-Testable Controller Architectures Based on Realistic Fault Analysis. University Siegen, Germany, 1995.
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1995 | Report | LibreCat-ID: 13028
Hellebrand, Sybille, Maik Herzog, and Hans-Joachim Wunderlich. Partitioning of CMOS-Circuits for On-Chip IDDQ-Testing. University of Siegen, Germany, 1995.
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1995 | Misc | LibreCat-ID: 13086
Hellebrand, Sybille, Birgit Reeb, Steffen Tarnick, and Hans-Joachim Wunderlich. Pattern Generation for a Deterministic BIST Scheme. 2nd IEEE International Test Synthesis Workshop, Santa Barbara, CA, 1995.
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1995 | Journal Article | LibreCat-ID: 13011
Hellebrand, Sybille, Janusz Rajski, Steffen Tarnick, Srikanth Venkataraman, and B. Courtois. “Built-In Test for Circuits with Scan Based on Reseeding of Multiple-Polynomial Linear Feedback Shift Registers.” IEEE Transactions on Computers 44, no. 2 (1995): 223–33. https://doi.org/10.1109/12.364534.
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1995 | Conference Paper | LibreCat-ID: 13012
Hellebrand, Sybille, Birgit Reeb, Steffen Tarnick, and Hans-Joachim Wunderlich. “Pattern Generation for a Deterministic BIST Scheme.” In ACM/IEEE International Conference on Computer Aided Design (ICCAD’95), 88–94. San Jose, CA, USA: IEEE, 1995. https://doi.org/10.1109/iccad.1995.479997.
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1994 | Report | LibreCat-ID: 13024
Hellebrand, Sybille, Arne Juergensen, and Hans-Joachim Wunderlich. Synthesis for Off-Line Testability. University of Siegen, Germany, 1994.
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1994 | Report | LibreCat-ID: 13025
Hellebrand, Sybille, Arne Juergensen, Albrecht Stroele, and Hans-Joachim Wunderlich. Chip Level Test Planning for Controlling the Tradeoff between Hardware Overhead and Test Time. University of Siegen, Germany, 1994.
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1994 | Misc | LibreCat-ID: 13083
Venkataraman, Srikanth, Janusz Rajski, Sybille Hellebrand, and Steffen Tarnick. Effiziente Testsatzkodierung Für Prüfpfad-Basierte Selbsttestarchitekturen. 6th ITG/GI/GME Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen”, Vaals, The Netherlands, 1994.
LibreCat
1994 | Misc | LibreCat-ID: 13084
Hellebrand, Sybille, and Hans-Joachim Wunderlich. Ein Verfahren Zur Testfreundlichen Steuerwerkssynthese. 6th ITG/GI/GME Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen”, Vaals, The Netherlands, 1994.
LibreCat
1994 | Misc | LibreCat-ID: 13085
Hellebrand, Sybille, Joao Paulo Teixeira, and Hans-Joachim Wunderlich. Synthesis for Testability - the ARCHIMEDES Approach. 1st IEEE International Test Synthesis Workshop, Santa Barbara, CA, USA, 1994.
LibreCat
1994 | Conference Paper | LibreCat-ID: 13014
Hellebrand, Sybille, and Hans-Joachim Wunderlich. “An Efficient Procedure for the Synthesis of Fast Self-Testable Controller Structures.” In ACM/IEEE International Conference on Computer-Aided Design (ICCAD’94), 110–16. San Jose, CA, USA: IEEE, 1994. https://doi.org/10.1109/iccad.1994.629752.
LibreCat
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1994 | Conference Paper | LibreCat-ID: 13059
Hellebrand, Sybille, and Hans-Joachim Wunderlich. “Synthese Schneller Selbsttestbarer Steuerwerke.” In Tagungsband Der GI/GME/ITG-Fachtagung \& Rechnergestützter Entwurf Und Architektur Mikroelektronischer Systeme, 3–11. Oberwiesenthal, Informatik Xpress 4, TU Chemnitz Zwickau, Germany, 1994.
LibreCat
1994 | Conference Paper | LibreCat-ID: 13013
Hellebrand, Sybille, and Hans-Joachim Wunderlich. “Synthesis of Self-Testable Controllers.” In European Design and Test Conference (EDAC/ETC/EUROASIC), 580–85. Paris, France, 1994. https://doi.org/10.1109/edtc.1994.326815.
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1993 | Misc | LibreCat-ID: 13081
Hellebrand, Sybille, Steffen Tarnick, Janusz Rajski, and Bernard Courtois. Effiziente Erzeugung Deterministischer Muster Im Selbsttest. 5th ITG/GI/GME Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen”, Holzhau, Germany, 1993.
LibreCat
1993 | Misc | LibreCat-ID: 13082
Hellebrand, Sybille, and Hans-Joachim Wunderlich. Synthesis of Self-Testable Controllers. ARCHIMEDES Open Workshop on “Synthesis - Architectural Testability Support”, Montpellier, France, 1993.
LibreCat
1993 | Conference Paper | LibreCat-ID: 13015
Venkataraman, Srikanth, Janusz Rajski, Sybille Hellebrand, and Steffen Tarnick. “An Efficient Bist Scheme Based On Reseeding Of Multiple Polynomial Linear Feedback Shift Registers.” In ACM/IEEE International Conference on Computer Aided Design (ICCAD’93). IEEE, 1993. https://doi.org/10.1109/iccad.1993.580117.
LibreCat
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1992 | Report | LibreCat-ID: 13023
Hellebrand, Sybille, Steffen Tarnick, Janusz Rajski, and Bernard Courtois. Generation of Vector Patterns through Reseeding of Multiple-Polynomial LFSRs. Institut National Polytechnique de Grenoble, Grenoble, France, 1992.
LibreCat
1992 | Misc | LibreCat-ID: 13076
Hellebrand, Sybille, Steffen Tarnick, Janusz Rajski, and Bernard Courtois. Generation of Vector Patterns through Reseeding of Multiple-Polynomial LFSRs. IEEE Design for Testability Workshop, Vail, CO, USA, 1992.
LibreCat
1992 | Misc | LibreCat-ID: 13080
Hellebrand, Sybille, Steffen Tarnick, Janusz Rajski, and Bernard Courtois. Generation of Vector Patterns through Reseeding of Multiple-Polynomial LFSRs. Workshop on New Directions for Testing, Montreal, Canada, 1992.
LibreCat
1992 | Journal Article | LibreCat-ID: 13017
Wunderlich, Hans-Joachim, and Sybille Hellebrand. “The Pseudoexhaustive Test of Sequential Circuits.” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD) 11, no. 1 (1992): 26–33. https://doi.org/10.1109/43.108616.
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1992 | Conference Paper | LibreCat-ID: 13016
Hellebrand, Sybille, Steffen Tarnick, Janusz Rajski, and Bernard Courtois. “Generation of Vector Patterns through Reseeding of Multiple-Polynomial Linear Feedback Shift Registers.” In IEEE International Test Conference (ITC’92), 120–29. Baltimore, MD, USA: IEEE, 1992. https://doi.org/10.1109/test.1992.527812.
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1991 | Book | LibreCat-ID: 13034
Hellebrand, Sybille. Synthese Vollständig Testbarer Schaltungen. 10. Verlag Düsseldorf: VDI Verlag: Verlag Düsseldorf: VDI Verlag, 1991.
LibreCat
1990 | Misc | LibreCat-ID: 13103
Hellebrand, Sybille, Hans-Joachim Wunderlich, and Oliver F. Haberl. Generating Pseudo-Exhaustive Vectors for External Testing. IEEE Design for Testability Workshop, Vail, CO, USA, 1990.
LibreCat
1990 | Conference Paper | LibreCat-ID: 13018
Hellebrand, Sybille, and Hans-Joachim Wunderlich. “Tools and Devices Supporting the Pseudo-Exhaustive Test.” In European Design Automation Conference (EDAC’90), 13–17. Glasgow, UK: IEEE, 1990. https://doi.org/10.1109/edac.1990.136612.
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1990 | Conference Paper | LibreCat-ID: 13019
Hellebrand, Sybille, Hans-Joachim Wunderlich, and Oliver F. Haberl. “Generating Pseudo-Exhaustive Vectors for External Testing.” In IEEE International Test Conference (ITC’90), 670–79. Washington, DC, USA: IEEE, 1990. https://doi.org/10.1109/test.1990.114082.
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