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165 Publications
2024 | Conference Paper | LibreCat-ID: 52744
Jafarzadeh, Hanieh, et al. “Time and Space Optimized Storage-Based BIST under Multiple Voltages and Variations.” European Test Symposium, The Hague, Netherlands, May 20-24, 2024, IEEE, p. 6.
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2024 | Conference Paper | LibreCat-ID: 52742
Jafarzadeh, Hanieh, et al. “Vmin Testing under Variations: Defect vs. Fault Coverage.” IEEE Latin American Test Symposium (LATS), Maceió, Brazil, April 9-12, 2024, IEEE, p. 6.
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2024 | Conference Paper | LibreCat-ID: 52743
Hellebrand, Sybille, et al. “Functional Safety and Reliability of Interconnects throughout the Silicon Life Cycle.” International Symposium of EDA (ISEDA), Xi’an, China, May 10-13, 2024, p. 1.
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2024 | Conference Paper | LibreCat-ID: 52745
Wunderlich, Hans-Joachim, et al. “Robust Test of Small Delay Faults under PVT-Variations.” International Symposium of EDA (ISEDA), Xi’an, China, May 10-13, 2024, p. 1.
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2024 | Misc | LibreCat-ID: 50284
Stiballe, Alisa, et al. Modeling Crosstalk-Induced Interconnect Delay with Polynomial Regression. 37. ITG / GMM / GI -Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen” (TuZ’24), Feb. 2024, 2024.
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2023 | Misc | LibreCat-ID: 35204
Ghazal, Abdulkarim, et al. On Cryptography Effects on Interconnect Reliability. 35. Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen” (TuZ’23), Feb. 2023, 2023.
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2023 | Dissertation | LibreCat-ID: 46482 | 
Sprenger, Alexander. Testinstrumente und Testdatenanalyse zur Verarbeitung von Unsicherheiten in Logikblöcken hochintegrierter Schaltungen. Universität Paderborn, 2023, doi:10.17619/UNIPB/1-1787.
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2023 | Conference Paper | LibreCat-ID: 46739
Sadeghi-Kohan, Somayeh, et al. “Low Power Streaming of Sensor Data Using Gray Code-Based Approximate Communication.” 2023 53rd Annual IEEE/IFIP International Conference on Dependable Systems and Networks Workshops (DSN-W), IEEE, 2023, doi:10.1109/dsn-w58399.2023.00056.
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2023 | Conference Paper | LibreCat-ID: 46738
Sadeghi-Kohan, Somayeh, et al. “Optimizing the Streaming of Sensor Data with Approximate Communication.” IEEE Asian Test Symposium (ATS’23), October 2023, 2023.
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2023 | Journal Article | LibreCat-ID: 46264
Sadeghi-Kohan, Somayeh, et al. “Workload-Aware Periodic Interconnect BIST.” IEEE Design &Test, Institute of Electrical and Electronics Engineers (IEEE), 2023, pp. 1–1, doi:10.1109/mdat.2023.3298849.
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2023 | Conference Paper | LibreCat-ID: 45830
Jafarzadeh, Hanieh, et al. “Robust Pattern Generation for Small Delay Faults under Process Variations.” IEEE International Test Conference (ITC’23), Anaheim, USA, October 2023, IEEE, 2023.
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2022 | Journal Article | LibreCat-ID: 29351
Sadeghi-Kohan, Somayeh, et al. “Stress-Aware Periodic Test of Interconnects.” Journal of Electronic Testing, Springer Science and Business Media LLC, 2022, doi:10.1007/s10836-021-05979-5.
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2022 | Misc | LibreCat-ID: 29890
Sadeghi-Kohan, Somayeh, et al. EM-Aware Interconnect BIST. European Workshop on Silicon Lifecycle Management, March 18, 2022, 2022.
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2020 | Conference Paper | LibreCat-ID: 19422
Sprenger, Alexander, et al. “Variation-Aware Test for Logic Interconnects Using Neural Networks - A Case Study.” IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT’20), October 2020, 2020.
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2020 | Misc | LibreCat-ID: 15419
Sadeghi-Kohan, Somayeh, and Sybille Hellebrand. Dynamic Multi-Frequency Test Method for Hidden Interconnect Defects. 32. Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen” (TuZ’20), 16. - 18. Februar 2020, 2020.
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2020 | Conference Paper | LibreCat-ID: 29200
Sadeghi-Kohan, Somayeh, and Sybille Hellebrand. “Dynamic Multi-Frequency Test Method for Hidden Interconnect Defects.” 38th IEEE VLSI Test Symposium (VTS), IEEE, 2020, doi:10.1109/vts48691.2020.9107591.
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2020 | Conference Paper | LibreCat-ID: 19421
Holst, Stefan, et al. “Logic Fault Diagnosis of Hidden Delay Defects.” IEEE International Test Conference (ITC’20), November 2020, 2020.
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2019 | Misc | LibreCat-ID: 8112
Maaz, Mohammad Urf, et al. A Hybrid Space Compactor for Varying X-Rates. 31. Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen” (TuZ’19), 2019.
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2019 | Journal Article | LibreCat-ID: 8667
Sprenger, Alexander, and Sybille Hellebrand. “Divide and Compact - Stochastic Space Compaction for Faster-than-At-Speed Test.” Journal of Circuits, Systems and Computers, vol. 28, no. 1, World Scientific Publishing Company, 2019, pp. 1–23, doi:10.1142/s0218126619400012.
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2019 | Journal Article | LibreCat-ID: 13048
Kampmann, Matthias, et al. “Built-in Test for Hidden Delay Faults.” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 38, no. 10, IEEE, 2019, pp. 1956–68.
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2019 | Conference Paper | LibreCat-ID: 12918
Maaz, Mohammad Urf, et al. “A Hybrid Space Compactor for Adaptive X-Handling.” 50th IEEE International Test Conference (ITC), IEEE, 2019, pp. 1–8.
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2018 | Misc | LibreCat-ID: 4576
Sprenger, Alexander, and Sybille Hellebrand. Stochastische Kompaktierung für den Hochgeschwindigkeitstest. 30. Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen” (TuZ’18), 2018.
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2018 | Journal Article | LibreCat-ID: 12974
Hellebrand, Sybille, et al. “Guest Editors’ Introduction - Special Issue on Approximate Computing.” IEEE Embedded Systems Letters, vol. 10, no. 1, IEEE, 2018, pp. 1–1, doi:10.1109/les.2018.2789942.
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2018 | Journal Article | LibreCat-ID: 13057
Kampmann, Matthias, and Sybille Hellebrand. “Design For Small Delay Test - A Simulation Study.” Microelectronics Reliability, vol. 80, 2018, pp. 124–33.
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2018 | Misc | LibreCat-ID: 13072
Kampmann, Matthias, and Sybille Hellebrand. Optimized Constraints for Scan-Chain Insertion for Faster-than-at-Speed Test. 2018.
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2018 | Conference Paper | LibreCat-ID: 29460
Rezaeizadeh Rookerd, Ramin, et al. “Performance and Energy Enhancement through an Online Single/Multi Level Mode Switching Cache Architecture.” Proceedings of the 2018 on Great Lakes Symposium on VLSI, ACM, 2018, doi:10.1145/3194554.3194599.
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2018 | Conference Paper | LibreCat-ID: 4575
Sprenger, Alexander, and Sybille Hellebrand. “Tuning Stochastic Space Compaction to Faster-than-at-Speed Test.” 2018 IEEE 21st International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS), IEEE, 2018, doi:10.1109/ddecs.2018.00020.
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2018 | Conference Paper | LibreCat-ID: 10575
Liu, Chang, et al. “Extending Aging Monitors for Early Life and Wear-Out Failure Prevention.” 27th IEEE Asian Test Symposium (ATS’18), 2018, doi:10.1109/ats.2018.00028.
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2018 | Conference Paper | LibreCat-ID: 29459
Sadeghi-Kohan, Somayeh, et al. “Near-Optimal Node Selection Procedure for Aging Monitor Placement.” 2018 IEEE 24th International Symposium on On-Line Testing And Robust System Design (IOLTS), IEEE, 2018, doi:10.1109/iolts.2018.8474120.
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2017 | Conference Paper | LibreCat-ID: 12973
Deshmukh, Jyotirmoy, et al. “Special Session on Early Life Failures.” 35th IEEE VLSI Test Symposium (VTS’17), IEEE, 2017, doi:10.1109/vts.2017.7928933.
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2017 | Misc | LibreCat-ID: 13078
Kampmann, Matthias, and Sybille Hellebrand. X-Tolerante Prüfzellengruppierung Für Den Test Mit Erhöhter Betriebsfrequenz. 2017.
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2017 | Conference Paper | LibreCat-ID: 10576
Kampmann, Matthias, and Sybille Hellebrand. “Design-for-FAST: Supporting X-Tolerant Compaction during Faster-than-at-Speed Test.” 20th IEEE International Symposium on Design & Diagnostics of Electronic Circuits & Systems (DDECS’17), IEEE, 2017, doi:10.1109/ddecs.2017.7934564.
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2017 | Journal Article | LibreCat-ID: 29462
Sadeghi-Kohan, Somayeh, et al. “Self-Adjusting Monitor for Measuring Aging Rate and Advancement.” IEEE Transactions on Emerging Topics in Computing, vol. 8, no. 3, Institute of Electrical and Electronics Engineers (IEEE), 2017, pp. 627–41, doi:10.1109/tetc.2017.2771441.
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2017 | Conference Paper | LibreCat-ID: 29463
Jenihhin, Maksim, et al. “Universal Mitigation of NBTI-Induced Aging by Design Randomization.” 2016 IEEE East-West Design & Test Symposium (EWDTS), IEEE, 2017, doi:10.1109/ewdts.2016.7807635.
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2016 | Conference Paper | LibreCat-ID: 12975
Kampmann, Matthias, and Sybille Hellebrand. “X Marks the Spot: Scan-Flip-Flop Clustering for Faster-than-at-Speed Test.” 25th IEEE Asian Test Symposium (ATS’16), IEEE, 2016, pp. 1–6, doi:10.1109/ats.2016.20.
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2015 | Conference Paper | LibreCat-ID: 12976
Kampmann, Matthias, et al. “Optimized Selection of Frequencies for Faster-Than-at-Speed Test.” 24th IEEE Asian Test Symposium (ATS’15), IEEE, 2015, pp. 109–14, doi:10.1109/ats.2015.26.
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2015 | Journal Article | LibreCat-ID: 13056
Huang, Zhengfeng, et al. “A High Performance SEU Tolerant Latch.” Journal of Electronic Testing - Theory and Applications (JETTA), vol. 31, no. 4, Springer, 2015, pp. 349–59.
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2015 | Misc | LibreCat-ID: 13077
Hellebrand, Sybille, et al. Effiziente Auswahl von Testfrequenzen Für Den Test Kleiner Verzögerungsfehler. 2015.
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2015 | Conference Paper | LibreCat-ID: 29465
Sadeghi-Kohan, Somayeh, et al. “Aging in Digital Circuits and Age Monitoring: Object-Oriented Modeling and Evaluation.” 2015 10th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS), IEEE, 2015, doi:10.1109/dtis.2015.7127373.
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2015 | Conference Paper | LibreCat-ID: 29466
Sadeghi-Kohan, Somayeh, et al. “Online Self Adjusting Progressive Age Monitoring of Timing Variations.” 2015 10th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS), IEEE, 2015, doi:10.1109/dtis.2015.7127368.
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2014 | Conference Paper | LibreCat-ID: 12977
Hellebrand, Sybille, et al. “FAST-BIST: Faster-than-at-Speed BIST Targeting Hidden Delay Defects.” IEEE International Test Conference (ITC’14), IEEE, 2014, doi:10.1109/test.2014.7035360.
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2014 | Journal Article | LibreCat-ID: 13054
Hellebrand, Sybille, and Hans-Joachim Wunderlich. “SAT-Based ATPG beyond Stuck-at Fault Testing.” DeGruyter Journal on Information Technology (It), vol. 56, no. 4, DeGruyter, 2014, pp. 165–72.
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2014 | Journal Article | LibreCat-ID: 13055
Rodriguez Gomez, Laura, et al. “Adaptive Bayesian Diagnosis of Intermittent Faults.” Journal of Electronic Testing - Theory and Applications (JETTA), vol. 30, no. 5, Springer, 2014, pp. 527–40.
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2014 | Journal Article | LibreCat-ID: 46266
Alizadeh, Bijan, et al. “A Scalable Formal Debugging Approach with Auto-Correction Capability Based on Static Slicing and Dynamic Ranking for RTL Datapath Designs.” IEEE Transactions on Computers, Institute of Electrical and Electronics Engineers (IEEE), 2014, pp. 1–1, doi:10.1109/tc.2014.2329687.
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2014 | Conference Paper | LibreCat-ID: 46268
Mohammadi, Marzieh, et al. “An Off-Line MDSI Interconnect BIST Incorporated in BS 1149.1.” 2014 19th IEEE European Test Symposium (ETS), IEEE, 2014, doi:10.1109/ets.2014.6847847.
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2014 | Conference Paper | LibreCat-ID: 46267
Sadeghi-Kohan, Somayeh, et al. “Improving Polynomial Datapath Debugging with HEDs.” 2014 19th IEEE European Test Symposium (ETS), IEEE, 2014, doi:10.1109/ets.2014.6847797.
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2013 | Conference Paper | LibreCat-ID: 12979
Hellebrand, Sybille. “Analyzing and Quantifying Fault Tolerance Properties.” 14th IEEE Latin American Test Workshop - (LATW’13), IEEE, 2013, doi:10.1109/latw.2013.6562662.
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2013 | Misc | LibreCat-ID: 13075
Cook, Alejandro, et al. Adaptive Test and Diagnosis of Intermittent Faults. 2013.
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2013 | Conference Paper | LibreCat-ID: 46271
Sadeghi-Kohan, Somayeh, et al. “BS 1149.1 Extensions for an Online Interconnect Fault Detection and Recovery.” 2012 IEEE International Test Conference, IEEE, 2013, doi:10.1109/test.2012.6401583.
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2013 | Conference Paper | LibreCat-ID: 46270
Sadeghi-Kohan, Somayeh, et al. “A New Structure for Interconnect Offline Testing.” East-West Design & Test Symposium (EWDTS 2013), IEEE, 2013, doi:10.1109/ewdts.2013.6673207.
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2012 | Conference Paper | LibreCat-ID: 12980
Cook, Alejandro, et al. “Built-in Self-Diagnosis Targeting Arbitrary Defects with Partial Pseudo-Exhaustive Test.” 13th IEEE Latin American Test Workshop (LATW’12), IEEE, 2012, pp. 1–4, doi:10.1109/latw.2012.6261229.
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2012 | Conference Paper | LibreCat-ID: 12981
Cook, Alejandro, et al. “Built-in Self-Diagnosis Exploiting Strong Diagnostic Windows in Mixed-Mode Test.” 17th IEEE European Test Symposium (ETS’12), IEEE, 2012, pp. 1–6, doi:10.1109/ets.2012.6233025.
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2012 | Misc | LibreCat-ID: 13074
Cook, Alejandro, et al. Eingebaute Selbstdiagnose Mit Zufälligen Und Deterministischen Mustern. 2012.
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2011 | Conference Paper | LibreCat-ID: 12982
Cook, Alejandro, et al. “Diagnostic Test of Robust Circuits.” 20th IEEE Asian Test Symposium (ATS’11), IEEE, 2011, pp. 285–90, doi:10.1109/ats.2011.55.
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2011 | Conference Paper | LibreCat-ID: 12984
Polian, Ilia, et al. “Towards Variation-Aware Test Methods.” 16th IEEE European Test Symposium Trondheim (ETS’11), IEEE, 2011, doi:10.1109/ets.2011.51.
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2011 | Conference Paper | LibreCat-ID: 13053
Cook, Alejandro, et al. “Robuster Selbsttest Mit Diagnose.” 5. GMM/GI/ITG Fachtagung “Zuverlässigkeit Und Entwurf,” 2011, pp. 48–53.
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2011 | Journal Article | LibreCat-ID: 13052
Hopsch, Fabian, et al. “Variation-Aware Fault Modeling.” SCIENCE CHINA Information Sciences, Science China Press, Co-Published with Springer, vol. 54, no. 4, 2011, pp. 1813–26.
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2011 | Conference Paper | LibreCat-ID: 46272
Kamran, Arezoo, et al. “Virtual Tester Development Using HDL/PLI.” 2010 East-West Design & Test Symposium (EWDTS), IEEE, 2011, doi:10.1109/ewdts.2010.5742156.
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2010 | Misc | LibreCat-ID: 10670
Fröse, Viktor, et al. Testdatenkompression Mit Hilfe Der Netzwerkinfrastruktur. 2010.
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2010 | Conference Paper | LibreCat-ID: 12987
Becker, Bernd, et al. “Massive Statistical Process Variations - A Grand Challenge for Testing Nanoelectronic Circuits.” 40th Annual IEEE/IFIP International Conference on Dependable Systems and Networks Workshops (DSN-W’10), IEEE, 2010, doi:10.1109/dsnw.2010.5542612.
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2010 | Conference Paper | LibreCat-ID: 13051
Hunger, Marc, and Sybille Hellebrand. “Ausbeute Und Fehlertoleranz Bei Dreifach Modularer Redundanz.” 4. GMM/GI/ITG-Fachtagung “Zuverlässigkeit Und Entwurf,” 2010, pp. 81–88.
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2010 | Conference Paper | LibreCat-ID: 12983
Hopsch, Fabian, et al. “Variation-Aware Fault Modeling.” 19th IEEE Asian Test Symposium (ATS’10), IEEE, 2010, pp. 87–93, doi:10.1109/ats.2010.24.
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2010 | Conference Paper | LibreCat-ID: 12985
Indlekofer, Thomas, et al. “Efficient Test Response Compaction for Robust BIST Using Parity Sequences.” 28th IEEE International Conference on Computer Design (ICCD’10), IEEE, 2010, pp. 480–85, doi:10.1109/iccd.2010.5647648.
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2010 | Conference Paper | LibreCat-ID: 12986
Hunger, Marc, and Sybille Hellebrand. “The Impact of Manufacturing Defects on the Fault Tolerance of TMR-Systems.” 25th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT’10), IEEE, 2010, pp. 101–08, doi:10.1109/dft.2010.19.
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2010 | Conference Paper | LibreCat-ID: 12988
Froese, Viktor, et al. “Reusing NoC-Infrastructure for Test Data Compression.” 28th IEEE VLSI Test Symposium (VTS’10), IEEE, 2010, pp. 227–31, doi:10.1109/vts.2010.5469570.
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2010 | Conference Paper | LibreCat-ID: 13049
Becker, Bernd, et al. “Massive Statistical Process Variations - A Grand Challenge for Testing Nanoelectronic Circuits.” 4th Workshop on Dependable and Secure Nanocomputing (WDSN’10), (Invited Paper), 2010.
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2010 | Conference Paper | LibreCat-ID: 13050
Indlekofer, Thomas, et al. “Robuster Selbsttest Mit Extremer Kompaktierung.” 4. GMM/GI/ITG-Fachtagung “Zuverlässigkeit Und Entwurf,” 2010, pp. 17–24.
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2009 | Conference Paper | LibreCat-ID: 12991
Hunger, Marc, et al. “ATPG-Based Grading of Strong Fault-Secureness.” 15th IEEE International On-Line Testing Symposium (IOLTS’09, IEEE, 2009, doi:10.1109/iolts.2009.5196027.
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2009 | Conference Paper | LibreCat-ID: 12990
Hellebrand, Sybille, and Marc Hunger. “Are Robust Circuits Really Robust?” 24th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT’09), (Invited Talk), IEEE, 2009, p. 77, doi:10.1109/dft.2009.28.
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2009 | Conference Paper | LibreCat-ID: 13030
Hunger, Marc, et al. “Robustheitsanalyse Stark Fehlersicherer Schaltungen Mit SAT-Basierter Testmustererzeugung.” 3. GMM/GI/ITG-Fachtagung “Zuverlässigkeit Und Entwurf,” 2009.
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2008 | Misc | LibreCat-ID: 13033
Coym, Torsten, et al. Ein Verfeinertes Elektrisches Modell Für Teilchentreffer Und Dessen Auswirkung Auf Die Bewertung Der Schaltungsempfindlichkeit. 2008.
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2008 | Misc | LibreCat-ID: 13035
Amgalan, Uranmandakh, et al. Testen Mit Rücksetzpunkten - Ein Ansatz Zur Verbesserung Der Ausbeute Bei Robusten Schaltungen. 2008.
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2008 | Conference Paper | LibreCat-ID: 12992
Oehler, Philipp, et al. “A Modular Memory BIST for Optimized Memory Repair.” 14th IEEE International On-Line Testing Symposium (IOLTS’08), (Poster), IEEE, 2008, doi:10.1109/iolts.2008.30.
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2008 | Conference Paper | LibreCat-ID: 12994
Amgalan, Uranmandakh, et al. “Signature Rollback - A Technique for Testing Robust Circuits.” 26th IEEE VLSI Test Symposium (VTS’08), IEEE, 2008, pp. 125–30, doi:10.1109/vts.2008.34.
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2008 | Conference Paper | LibreCat-ID: 12993
Hunger, Marc, and Sybille Hellebrand. “Verification and Analysis of Self-Checking Properties through ATPG.” 14th IEEE International On-Line Testing Symposium (IOLTS’08), IEEE, 2008, doi:10.1109/iolts.2008.32.
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2008 | Conference Paper | LibreCat-ID: 13031
Hunger, Marc, and Sybille Hellebrand. “Analyse Selbstprüfender Schaltungen – Nachweis von Fehlersicherheit Und Selbsttestbarkeit Mit ATPG.” 2. GMM/GI/ITG-Fachtagung “Zuverlässigkeit Und Entwurf,” 2008.
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2008 | Conference Paper | LibreCat-ID: 13032
Oehler, Philipp, et al. “Modularer Selbsttest Und Optimierte Reparaturanalyse.” 2. GMM/GI/ITG-Fachtagung “Zuverlässigkeit Und Entwurf,” 2008.
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2007 | Misc | LibreCat-ID: 13038
Hellebrand, Sybille. Reliable Nanoscale Systems - Challenges and Strategies for On- and Offline Testing. 2007.
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2007 | Misc | LibreCat-ID: 13039
Ali, Muhammad, et al. An End-to-End Reliability Protocol to Address Transient Faults in Network on Chips. 2007.
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2007 | Misc | LibreCat-ID: 13042
Oehler, Philipp, et al. An Integrated Built-in Test and Repair Approach for Memories with 2D Redundancy. 2007.
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2007 | Misc | LibreCat-ID: 13043
Hellebrand, Sybille. Qualitätssicherung Für Nanochips - Wie IT-Produkte Zuverlässig Werden. 2007.
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2007 | Conference Paper | LibreCat-ID: 12995
Hellebrand, Sybille, et al. “A Refined Electrical Model for Particle Strikes and Its Impact on SEU Prediction.” 22nd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT’07), IEEE, 2007, pp. 50–58, doi:10.1109/dft.2007.43.
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2007 | Conference Paper | LibreCat-ID: 12996
Oehler, Philipp, et al. “Analyzing Test and Repair Times for 2D Integrated Memory Built-in Test and Repair.” 10th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems (DDECS’07), IEEE, 2007, pp. 185–90, doi:10.1109/ddecs.2007.4295278.
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2007 | Conference Paper | LibreCat-ID: 12997
Oehler, Philipp, et al. “An Integrated Built-In Test and Repair Approach for Memories with 2D Redundancy.” 12th IEEE European Test Symposium (ETS’07), IEEE, 2007, pp. 91–96, doi:10.1109/ets.2007.10.
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2007 | Conference Paper | LibreCat-ID: 13037
Hellebrand, Sybille, et al. “Testing and Monitoring Nanoscale Systems - Challenges and Strategies for Advanced Quality Assurance.” 43rd International Conference on Microelectronics, Devices and Material with the Workshop on Electronic Testing (MIDEM’07), (Invited Paper), 2007.
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2007 | Journal Article | LibreCat-ID: 13036
Hellebrand, Sybille, et al. “Testing and Monitoring Nanoscale Systems - Challenges and Strategies for Advanced Quality Assurance.” Informacije MIDEM, Ljubljana (Invited Paper), vol. 37, no. 4 (124), 2007, pp. 212–19.
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2007 | Journal Article | LibreCat-ID: 13044
Ali, Muhammad, et al. “An Efficient Fault Tolerant Mechanism to Deal with Permanent and Transient Failures in a Network on Chip.” International Journal on High Performance Systems Architecture, vol. 1, no. 2, 2007, pp. 113–23.
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2007 | Conference Paper | LibreCat-ID: 13040
Ali, Muhammad, et al. “A Fault Tolerant Mechanism for Handling Permanent and Transient Failures in a Network on Chip.” 4th International Conference on Information Technology: New Generations (ITNG’07), 2007, pp. 1027–32.
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2007 | Conference Paper | LibreCat-ID: 13041
Becker, Bernd, et al. “Test Und Zuverlässigkeit Nanoelektronischer Systeme.” 1. GMM/GI/ITG-Fachtagung “Zuverlässigkeit Und Entwurf,” 2007.
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2006 | Journal Article | LibreCat-ID: 13045
Becker, Bernd, et al. “DFG-Projekt RealTest - Test Und Zuverlässigkeit Nanoelektronischer Systeme.” It - Information Technology, vol. 48, no. 5, 2006, pp. 305–11.
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2005 | Misc | LibreCat-ID: 13046
Oehler, Philipp, and Sybille Hellebrand. A Low Power Design for Embedded DRAMs with Online Consistency Checking. 2005.
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2005 | Misc | LibreCat-ID: 13101
Ali, Muhammad, et al. Dynamic Routing: A Prerequisite for Reliable NoCs. 2005.
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2005 | Misc | LibreCat-ID: 13102
Oehler, Philipp, and Sybille Hellebrand. Power Consumption Versus Error Correcting Capabilities in Embedded DRAMs - A Case Study. 2005.
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2005 | Conference Paper | LibreCat-ID: 12999
Ali, Muhammad, et al. “Considerations for Fault-Tolerant Networks on Chips.” IEEE International Conference on Microelectronics (ICM’05), IEEE, 2005, doi:10.1109/icm.2005.1590063.
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2005 | Conference Paper | LibreCat-ID: 13000
Oehler, Philipp, and Sybille Hellebrand. “Low Power Embedded DRAMs with High Quality Error Correcting Capabilities.” 10th IEEE European Test Symposium (ETS’05), IEEE, 2005, pp. 148–53, doi:10.1109/ets.2005.28.
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2005 | Conference Paper | LibreCat-ID: 12998
Ali, Muhammad, et al. “A Dynamic Routing Mechanism for Network on Chip.” 23rd IEEE NORCHIP Conference, IEEE, 2005, pp. 70–73, doi:10.1109/norchp.2005.1596991.
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2004 | Conference Paper | LibreCat-ID: 13071
Liu Jing, Michelle, et al. “Sensor Networks with More Features Using Less Hardware.” {GOR/NGB Conference Tilburg 2004}, 2004.
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2004 | Misc | LibreCat-ID: 13099
Breu, Ruth, et al. Im Westen Viel Neues - Informatik an Der Universität Innsbruck. 2004.
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2004 | Misc | LibreCat-ID: 13100
Hellebrand, Sybille, et al. Data Compression for Multiple Scan Chains Using Dictionaries with Corrections. 2004.
LibreCat