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165 Publications


2019 | Conference Paper | LibreCat-ID: 12918
Maaz, Mohammad Urf, et al. “A Hybrid Space Compactor for Adaptive X-Handling.” 50th IEEE International Test Conference (ITC), IEEE, 2019, pp. 1–8.
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2018 | Misc | LibreCat-ID: 4576
Sprenger, Alexander, and Sybille Hellebrand. Stochastische Kompaktierung für den Hochgeschwindigkeitstest. 30. Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen” (TuZ’18), 2018.
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2018 | Journal Article | LibreCat-ID: 12974
Hellebrand, Sybille, et al. “Guest Editors’ Introduction - Special Issue on Approximate Computing.” IEEE Embedded Systems Letters, vol. 10, no. 1, IEEE, 2018, pp. 1–1, doi:10.1109/les.2018.2789942.
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2018 | Journal Article | LibreCat-ID: 13057
Kampmann, Matthias, and Sybille Hellebrand. “Design For Small Delay Test - A Simulation Study.” Microelectronics Reliability, vol. 80, 2018, pp. 124–33.
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2018 | Misc | LibreCat-ID: 13072
Kampmann, Matthias, and Sybille Hellebrand. Optimized Constraints for Scan-Chain Insertion for Faster-than-at-Speed Test. 2018.
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2018 | Conference Paper | LibreCat-ID: 29460
Rezaeizadeh Rookerd, Ramin, et al. “Performance and Energy Enhancement through an Online Single/Multi Level Mode Switching Cache Architecture.” Proceedings of the 2018 on Great Lakes Symposium on VLSI, ACM, 2018, doi:10.1145/3194554.3194599.
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2018 | Conference Paper | LibreCat-ID: 4575
Sprenger, Alexander, and Sybille Hellebrand. “Tuning Stochastic Space Compaction to Faster-than-at-Speed Test.” 2018 IEEE 21st International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS), IEEE, 2018, doi:10.1109/ddecs.2018.00020.
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2018 | Conference Paper | LibreCat-ID: 10575
Liu, Chang, et al. “Extending Aging Monitors for Early Life and Wear-Out Failure Prevention.” 27th IEEE Asian Test Symposium (ATS’18), 2018, doi:10.1109/ats.2018.00028.
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2018 | Conference Paper | LibreCat-ID: 29459
Sadeghi-Kohan, Somayeh, et al. “Near-Optimal Node Selection Procedure for Aging Monitor Placement.” 2018 IEEE 24th International Symposium on On-Line Testing And Robust System Design (IOLTS), IEEE, 2018, doi:10.1109/iolts.2018.8474120.
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2017 | Conference Paper | LibreCat-ID: 12973
Deshmukh, Jyotirmoy, et al. “Special Session on Early Life Failures.” 35th IEEE VLSI Test Symposium (VTS’17), IEEE, 2017, doi:10.1109/vts.2017.7928933.
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2017 | Misc | LibreCat-ID: 13078
Kampmann, Matthias, and Sybille Hellebrand. X-Tolerante Prüfzellengruppierung Für Den Test Mit Erhöhter Betriebsfrequenz. 2017.
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2017 | Conference Paper | LibreCat-ID: 10576
Kampmann, Matthias, and Sybille Hellebrand. “Design-for-FAST: Supporting X-Tolerant Compaction during Faster-than-at-Speed Test.” 20th IEEE International Symposium on Design & Diagnostics of Electronic Circuits & Systems (DDECS’17), IEEE, 2017, doi:10.1109/ddecs.2017.7934564.
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2017 | Journal Article | LibreCat-ID: 29462
Sadeghi-Kohan, Somayeh, et al. “Self-Adjusting Monitor for Measuring Aging Rate and Advancement.” IEEE Transactions on Emerging Topics in Computing, vol. 8, no. 3, Institute of Electrical and Electronics Engineers (IEEE), 2017, pp. 627–41, doi:10.1109/tetc.2017.2771441.
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2017 | Conference Paper | LibreCat-ID: 29463
Jenihhin, Maksim, et al. “Universal Mitigation of NBTI-Induced Aging by Design Randomization.” 2016 IEEE East-West Design & Test Symposium (EWDTS), IEEE, 2017, doi:10.1109/ewdts.2016.7807635.
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2016 | Conference Paper | LibreCat-ID: 12975
Kampmann, Matthias, and Sybille Hellebrand. “X Marks the Spot: Scan-Flip-Flop Clustering for Faster-than-at-Speed Test.” 25th IEEE Asian Test Symposium (ATS’16), IEEE, 2016, pp. 1–6, doi:10.1109/ats.2016.20.
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2015 | Conference Paper | LibreCat-ID: 12976
Kampmann, Matthias, et al. “Optimized Selection of Frequencies for Faster-Than-at-Speed Test.” 24th IEEE Asian Test Symposium (ATS’15), IEEE, 2015, pp. 109–14, doi:10.1109/ats.2015.26.
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2015 | Journal Article | LibreCat-ID: 13056
Huang, Zhengfeng, et al. “A High Performance SEU Tolerant Latch.” Journal of Electronic Testing - Theory and Applications (JETTA), vol. 31, no. 4, Springer, 2015, pp. 349–59.
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2015 | Misc | LibreCat-ID: 13077
Hellebrand, Sybille, et al. Effiziente Auswahl von Testfrequenzen Für Den Test Kleiner Verzögerungsfehler. 2015.
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2015 | Conference Paper | LibreCat-ID: 29465
Sadeghi-Kohan, Somayeh, et al. “Aging in Digital Circuits and Age Monitoring: Object-Oriented Modeling and Evaluation.” 2015 10th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS), IEEE, 2015, doi:10.1109/dtis.2015.7127373.
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2015 | Conference Paper | LibreCat-ID: 29466
Sadeghi-Kohan, Somayeh, et al. “Online Self Adjusting Progressive Age Monitoring of Timing Variations.” 2015 10th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS), IEEE, 2015, doi:10.1109/dtis.2015.7127368.
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2014 | Conference Paper | LibreCat-ID: 12977
Hellebrand, Sybille, et al. “FAST-BIST: Faster-than-at-Speed BIST Targeting Hidden Delay Defects.” IEEE International Test Conference (ITC’14), IEEE, 2014, doi:10.1109/test.2014.7035360.
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2014 | Journal Article | LibreCat-ID: 13054
Hellebrand, Sybille, and Hans-Joachim Wunderlich. “SAT-Based ATPG beyond Stuck-at Fault Testing.” DeGruyter Journal on Information Technology (It), vol. 56, no. 4, DeGruyter, 2014, pp. 165–72.
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2014 | Journal Article | LibreCat-ID: 13055
Rodriguez Gomez, Laura, et al. “Adaptive Bayesian Diagnosis of Intermittent Faults.” Journal of Electronic Testing - Theory and Applications (JETTA), vol. 30, no. 5, Springer, 2014, pp. 527–40.
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2014 | Journal Article | LibreCat-ID: 46266
Alizadeh, Bijan, et al. “A Scalable Formal Debugging Approach with Auto-Correction Capability Based on Static Slicing and Dynamic Ranking for RTL Datapath Designs.” IEEE Transactions on Computers, Institute of Electrical and Electronics Engineers (IEEE), 2014, pp. 1–1, doi:10.1109/tc.2014.2329687.
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2014 | Conference Paper | LibreCat-ID: 46268
Mohammadi, Marzieh, et al. “An Off-Line MDSI Interconnect BIST Incorporated in BS 1149.1.” 2014 19th IEEE European Test Symposium (ETS), IEEE, 2014, doi:10.1109/ets.2014.6847847.
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2014 | Conference Paper | LibreCat-ID: 46267
Sadeghi-Kohan, Somayeh, et al. “Improving Polynomial Datapath Debugging with HEDs.” 2014 19th IEEE European Test Symposium (ETS), IEEE, 2014, doi:10.1109/ets.2014.6847797.
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2013 | Conference Paper | LibreCat-ID: 12979
Hellebrand, Sybille. “Analyzing and Quantifying Fault Tolerance Properties.” 14th IEEE Latin American Test Workshop - (LATW’13), IEEE, 2013, doi:10.1109/latw.2013.6562662.
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2013 | Misc | LibreCat-ID: 13075
Cook, Alejandro, et al. Adaptive Test and Diagnosis of Intermittent Faults. 2013.
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2013 | Conference Paper | LibreCat-ID: 46271
Sadeghi-Kohan, Somayeh, et al. “BS 1149.1 Extensions for an Online Interconnect Fault Detection and Recovery.” 2012 IEEE International Test Conference, IEEE, 2013, doi:10.1109/test.2012.6401583.
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2013 | Conference Paper | LibreCat-ID: 46270
Sadeghi-Kohan, Somayeh, et al. “A New Structure for Interconnect Offline Testing.” East-West Design & Test Symposium (EWDTS 2013), IEEE, 2013, doi:10.1109/ewdts.2013.6673207.
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2012 | Conference Paper | LibreCat-ID: 12980
Cook, Alejandro, et al. “Built-in Self-Diagnosis Targeting Arbitrary Defects with Partial Pseudo-Exhaustive Test.” 13th IEEE Latin American Test Workshop (LATW’12), IEEE, 2012, pp. 1–4, doi:10.1109/latw.2012.6261229.
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2012 | Conference Paper | LibreCat-ID: 12981
Cook, Alejandro, et al. “Built-in Self-Diagnosis Exploiting Strong Diagnostic Windows in Mixed-Mode Test.” 17th IEEE European Test Symposium (ETS’12), IEEE, 2012, pp. 1–6, doi:10.1109/ets.2012.6233025.
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2012 | Misc | LibreCat-ID: 13074
Cook, Alejandro, et al. Eingebaute Selbstdiagnose Mit Zufälligen Und Deterministischen Mustern. 2012.
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2011 | Conference Paper | LibreCat-ID: 12982
Cook, Alejandro, et al. “Diagnostic Test of Robust Circuits.” 20th IEEE Asian Test Symposium (ATS’11), IEEE, 2011, pp. 285–90, doi:10.1109/ats.2011.55.
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2011 | Conference Paper | LibreCat-ID: 12984
Polian, Ilia, et al. “Towards Variation-Aware Test Methods.” 16th IEEE European Test Symposium Trondheim (ETS’11), IEEE, 2011, doi:10.1109/ets.2011.51.
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2011 | Conference Paper | LibreCat-ID: 13053
Cook, Alejandro, et al. “Robuster Selbsttest Mit Diagnose.” 5. GMM/GI/ITG Fachtagung “Zuverlässigkeit Und Entwurf,” 2011, pp. 48–53.
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2011 | Journal Article | LibreCat-ID: 13052
Hopsch, Fabian, et al. “Variation-Aware Fault Modeling.” SCIENCE CHINA Information Sciences, Science China Press, Co-Published with Springer, vol. 54, no. 4, 2011, pp. 1813–26.
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2011 | Conference Paper | LibreCat-ID: 46272
Kamran, Arezoo, et al. “Virtual Tester Development Using HDL/PLI.” 2010 East-West Design & Test Symposium (EWDTS), IEEE, 2011, doi:10.1109/ewdts.2010.5742156.
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2010 | Misc | LibreCat-ID: 10670
Fröse, Viktor, et al. Testdatenkompression Mit Hilfe Der Netzwerkinfrastruktur. 2010.
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2010 | Conference Paper | LibreCat-ID: 12987
Becker, Bernd, et al. “Massive Statistical Process Variations - A Grand Challenge for Testing Nanoelectronic Circuits.” 40th Annual IEEE/IFIP International Conference on Dependable Systems and Networks Workshops (DSN-W’10), IEEE, 2010, doi:10.1109/dsnw.2010.5542612.
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2010 | Conference Paper | LibreCat-ID: 13051
Hunger, Marc, and Sybille Hellebrand. “Ausbeute Und Fehlertoleranz Bei Dreifach Modularer Redundanz.” 4. GMM/GI/ITG-Fachtagung “Zuverlässigkeit Und Entwurf,” 2010, pp. 81–88.
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2010 | Misc | LibreCat-ID: 13073
Hellebrand, Sybille. Nano-Electronic Systems. 2010.
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2010 | Conference Paper | LibreCat-ID: 12983
Hopsch, Fabian, et al. “Variation-Aware Fault Modeling.” 19th IEEE Asian Test Symposium (ATS’10), IEEE, 2010, pp. 87–93, doi:10.1109/ats.2010.24.
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2010 | Conference Paper | LibreCat-ID: 12985
Indlekofer, Thomas, et al. “Efficient Test Response Compaction for Robust BIST Using Parity Sequences.” 28th IEEE International Conference on Computer Design (ICCD’10), IEEE, 2010, pp. 480–85, doi:10.1109/iccd.2010.5647648.
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2010 | Conference Paper | LibreCat-ID: 12986
Hunger, Marc, and Sybille Hellebrand. “The Impact of Manufacturing Defects on the Fault Tolerance of TMR-Systems.” 25th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT’10), IEEE, 2010, pp. 101–08, doi:10.1109/dft.2010.19.
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2010 | Conference Paper | LibreCat-ID: 12988
Froese, Viktor, et al. “Reusing NoC-Infrastructure for Test Data Compression.” 28th IEEE VLSI Test Symposium (VTS’10), IEEE, 2010, pp. 227–31, doi:10.1109/vts.2010.5469570.
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2010 | Conference Paper | LibreCat-ID: 13049
Becker, Bernd, et al. “Massive Statistical Process Variations - A Grand Challenge for Testing Nanoelectronic Circuits.” 4th Workshop on Dependable and Secure Nanocomputing (WDSN’10), (Invited Paper), 2010.
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2010 | Conference Paper | LibreCat-ID: 13050
Indlekofer, Thomas, et al. “Robuster Selbsttest Mit Extremer Kompaktierung.” 4. GMM/GI/ITG-Fachtagung “Zuverlässigkeit Und Entwurf,” 2010, pp. 17–24.
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2009 | Conference Paper | LibreCat-ID: 12991
Hunger, Marc, et al. “ATPG-Based Grading of Strong Fault-Secureness.” 15th IEEE International On-Line Testing Symposium (IOLTS’09, IEEE, 2009, doi:10.1109/iolts.2009.5196027.
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2009 | Conference Paper | LibreCat-ID: 12990
Hellebrand, Sybille, and Marc Hunger. “Are Robust Circuits Really Robust?” 24th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT’09), (Invited Talk), IEEE, 2009, p. 77, doi:10.1109/dft.2009.28.
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