Please note that LibreCat no longer supports Internet Explorer versions 8 or 9 (or earlier).
We recommend upgrading to the latest Internet Explorer, Google Chrome, or Firefox.
146 Publications
2015 | Conference Paper | LibreCat-ID: 4465
T. Jenert and T. Brahm, “How Do They Find Their Place? A Longitudinal Study of Management Students’ Attitudes and Motivations During Their First Year at Business School,” presented at the American Educational Research Association (AERA) Annual Meeting 2015, Chicago, 2015.
LibreCat
2015 | Mastersthesis | LibreCat-ID: 5413
L. Funke, An LLVM Based Toolchain for Transparent Acceleration of Digital Image Processing Applications using FPGA Overlay Architectures. Universität Paderborn, 2015.
LibreCat
2015 | Mastersthesis | LibreCat-ID: 5416
T. Löcke, Instance-Specific Computing in Hard- and Software for Faster Solving of Complex Problems. Universität Paderborn, 2015.
LibreCat
2015 | Mastersthesis | LibreCat-ID: 5419
F. Wallaschek, Accelerating Programmable Logic Controllers with the use of FPGAs. Universität Paderborn, 2015.
LibreCat
2015 | Dissertation | LibreCat-ID: 10624
T. Beisel, Management and Scheduling of Accelerators for Heterogeneous High-Performance Computing. Berlin: Logos Verlag Berlin GmbH, 2015.
LibreCat
2015 | Journal Article | LibreCat-ID: 296
T. Kenter, H. Schmitz, and C. Plessl, “Exploring Tradeoffs between Specialized Kernels and a Reusable Overlay in a Stereo-Matching Case Study,” International Journal of Reconfigurable Computing (IJRC), vol. 2015, Art. no. 859425, 2015, doi: 10.1155/2015/859425.
LibreCat
| Files available
| DOI
2015 | Conference Paper | LibreCat-ID: 303 | 
M. Damschen and C. Plessl, “Easy-to-Use On-The-Fly Binary Program Acceleration on Many-Cores,” 2015.
LibreCat
| Files available
| arXiv
2015 | Conference Paper | LibreCat-ID: 1773
J. Schumacher et al., “Improving Packet Processing Performance in the ATLAS FELIX Project – Analysis and Optimization of a Memory-Bounded Algorithm,” 2015, doi: 10.1145/2675743.2771824.
LibreCat
| DOI
2015 | Journal Article | LibreCat-ID: 1768
C. Plessl, M. Platzner, and P. J. Schreier, “Aktuelles Schlagwort: Approximate Computing,” Informatik Spektrum, no. 5, pp. 396–399, 2015, doi: 10.1007/s00287-015-0911-z.
LibreCat
| DOI
2015 | Conference Paper | LibreCat-ID: 238
M. Damschen, H. Riebler, G. F. Vaz, and C. Plessl, “Transparent offloading of computational hotspots from binary code to Xeon Phi,” in Proceedings of the 2015 Conference on Design, Automation and Test in Europe (DATE), 2015, pp. 1078–1083, doi: 10.7873/DATE.2015.1124.
LibreCat
| Files available
| DOI
2015 | Journal Article | LibreCat-ID: 1775
J. Anderson et al., “FELIX: a High-Throughput Network Approach for Interfacing to Front End Electronics for ATLAS Upgrades,” Journal of Physics: Conference Series, vol. 664, Art. no. 082050, 2015, doi: 10.1088/1742-6596/664/8/082050.
LibreCat
| DOI
2014 | Book Chapter | LibreCat-ID: 335
M. Platzner and C. Plessl, “Verschiebungen an der Grenze zwischen Hardware und Software,” in Logiken strukturbildender Prozesse: Automatismen, J. Künsemöller, N. O. Eke, L. Foit, and T. Kaerlein, Eds. Paderborn: Wilhelm Fink, 2014, pp. 123–144.
LibreCat
| Files available
2014 | Conference Paper | LibreCat-ID: 388
T. Kenter, G. F. Vaz, and C. Plessl, “Partitioning and Vectorizing Binary Applications for a Reconfigurable Vector Computer,” in Proceedings of the International Symposium on Reconfigurable Computing: Architectures, Tools, and Applications (ARC), 2014, vol. 8405, pp. 144–155, doi: 10.1007/978-3-319-05960-0_13.
LibreCat
| Files available
| DOI
2014 | Journal Article | LibreCat-ID: 363
A. Agne, H. Hangmann, M. Happe, M. Platzner, and C. Plessl, “Seven Recipes for Setting Your FPGA on Fire – A Cookbook on Heat Generators,” Microprocessors and Microsystems, vol. 38, no. 8, Part B, pp. 911–919, 2014, doi: 10.1016/j.micpro.2013.12.001.
LibreCat
| Files available
| DOI
2014 | Conference Paper | LibreCat-ID: 377
H. Riebler, T. Kenter, C. Plessl, and C. Sorge, “Reconstructing AES Key Schedules from Decayed Memory with FPGAs,” in Proceedings of Field-Programmable Custom Computing Machines (FCCM), 2014, pp. 222–229, doi: 10.1109/FCCM.2014.67.
LibreCat
| Files available
| DOI
2014 | Journal Article | LibreCat-ID: 365
A. Agne, M. Happe, A. Lösch, C. Plessl, and M. Platzner, “Self-awareness as a Model for Designing and Operating Heterogeneous Multicores,” ACM Transactions on Reconfigurable Technology and Systems (TRETS), vol. 7, no. 2, Art. no. 13, 2014, doi: 10.1145/2617596.
LibreCat
| Files available
| DOI
2014 | Journal Article | LibreCat-ID: 328
A. Agne et al., “ReconOS - An Operating System Approach for Reconfigurable Computing,” IEEE Micro, vol. 34, no. 1, pp. 60–71, 2014, doi: 10.1109/MM.2013.110.
LibreCat
| Files available
| DOI
2014 | Conference Paper | LibreCat-ID: 1778
G. C. Durelli et al., “Runtime Resource Management in Heterogeneous System Architectures: The SAVE Approach,” in Proc. Int. Symp. on Parallel and Distributed Processing with Applications (ISPA), 2014, pp. 142–149, doi: 10.1109/ISPA.2014.27.
LibreCat
| DOI
2014 | Conference Paper | LibreCat-ID: 439
G. F. Vaz, H. Riebler, T. Kenter, and C. Plessl, “Deferring Accelerator Offloading Decisions to Application Runtime,” in Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), 2014, pp. 1–8, doi: 10.1109/ReConFig.2014.7032509.
LibreCat
| Files available
| DOI
2014 | Conference Paper | LibreCat-ID: 406
T. Kenter, H. Schmitz, and C. Plessl, “Kernel-Centric Acceleration of High Accuracy Stereo-Matching,” in Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), 2014, pp. 1–8, doi: 10.1109/ReConFig.2014.7032535.
LibreCat
| Files available
| DOI
2014 | Conference Paper | LibreCat-ID: 1780
G. C. Durelli et al., “SAVE: Towards efficient resource management in heterogeneous system architectures,” 2014, doi: 10.1007/978-3-319-05960-0_38.
LibreCat
| DOI
2014 | Journal Article | LibreCat-ID: 1779
H. Giefers, C. Plessl, and J. Förstner, “Accelerating Finite Difference Time Domain Simulations with Reconfigurable Dataflow Computers,” ACM SIGARCH Computer Architecture News, vol. 41, no. 5, pp. 65–70, 2014, doi: 10.1145/2641361.2641372.
LibreCat
| DOI
2013 | Mastersthesis | LibreCat-ID: 521
H. Riebler, Identifikation und Wiederherstellung von kryptographischen Schlüsseln mit FPGAs. Universität Paderborn, 2013.
LibreCat
2013 | Conference Paper | LibreCat-ID: 528
H. Riebler, T. Kenter, C. Sorge, and C. Plessl, “FPGA-accelerated Key Search for Cold-Boot Attacks against AES,” in Proceedings of the International Conference on Field-Programmable Technology (FPT), 2013, pp. 386–389, doi: 10.1109/FPT.2013.6718394.
LibreCat
| Files available
| DOI
2013 | Conference Paper | LibreCat-ID: 505
M. Happe, P. Kling, C. Plessl, M. Platzner, and F. Meyer auf der Heide, “On-The-Fly Computing: A Novel Paradigm for Individualized IT Services,” 2013, doi: 10.1109/ISORC.2013.6913232.
LibreCat
| Files available
| DOI
2013 | Conference Paper | LibreCat-ID: 1787
T. Suess, A. Schoenrock, S. Meisner, and C. Plessl, “Parallel Macro Pipelining on the Intel SCC Many-Core Computer,” in Proc. Int. Symp. on Parallel and Distributed Processing Workshops (IPDPSW), 2013, pp. 64–73, doi: 10.1109/IPDPSW.2013.136.
LibreCat
| DOI
2012 | Conference Paper | LibreCat-ID: 2107
R. Grunzke et al., “A Data Driven Science Gateway for Computational Workflows,” in Proc. UNICORE Summit, 2012.
LibreCat
2012 | Misc | LibreCat-ID: 587
C. Plessl, M. Platzner, A. Agne, M. Happe, and E. Lübbers, Programming models for reconfigurable heterogeneous multi-cores. Awareness Magazine, 2012.
LibreCat
| Files available
2012 | Conference Paper | LibreCat-ID: 2106
B. Meyer, J. Schumacher, C. Plessl, and J. Förstner, “Convey Vector Personalities – FPGA Acceleration with an OpenMP-like Effort?,” in Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), 2012, pp. 189–196, doi: 10.1109/FPL.2012.6339370.
LibreCat
| Files available
| DOI
2012 | Journal Article | LibreCat-ID: 2108
T. Schumacher, C. Plessl, and M. Platzner, “IMORC: An Infrastructure and Architecture Template for Implementing High-Performance Reconfigurable FPGA Accelerators,” Microprocessors and Microsystems, vol. 36, no. 2, pp. 110–126, 2012, doi: 10.1016/j.micpro.2011.04.002.
LibreCat
| DOI
2012 | Conference Paper | LibreCat-ID: 615
M. Happe, H. Hangmann, A. Agne, and C. Plessl, “Eight Ways to put your FPGA on Fire – A Systematic Study of Heat Generators,” in Proceedings of the International Conference on Reconfigurable Computing and FPGAs (ReConFig), 2012, pp. 1–8, doi: 10.1109/ReConFig.2012.6416745.
LibreCat
| Files available
| DOI
2012 | Conference Paper | LibreCat-ID: 591
T. Kenter, C. Plessl, and H. Schmitz, “Pragma based parallelization - Trading hardware efficiency for ease of use?,” in Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), 2012, pp. 1–8, doi: 10.1109/ReConFig.2012.6416773.
LibreCat
| Files available
| DOI
2012 | Conference Paper | LibreCat-ID: 609
M. Happe, A. Agne, C. Plessl, and M. Platzner, “Hardware/Software Platform for Self-aware Compute Nodes,” in Proceedings of the Workshop on Self-Awareness in Reconfigurable Computing Systems (SRCS), 2012, pp. 8–9.
LibreCat
| Files available
2012 | Conference Paper | LibreCat-ID: 567
P. Barrio, C. Carreras, R. Sierra, T. Kenter, and C. Plessl, “Turning control flow graphs into function calls: Code generation for heterogeneous architectures,” in Proceedings of the International Conference on High Performance Computing and Simulation (HPCS), 2012, pp. 559–565, doi: 10.1109/HPCSim.2012.6266973.
LibreCat
| Files available
| DOI
2012 | Conference Paper | LibreCat-ID: 612
C. Rüthing, M. Happe, A. Agne, and C. Plessl, “Exploration of Ring Oscillator Design Space for Temperature Measurements on FPGAs,” in Proceedings of the International Conference on Field Programmable Logic and Applications (FPL), 2012, pp. 559–562, doi: 10.1109/FPL.2012.6339370.
LibreCat
| Files available
| DOI
2012 | Conference Paper | LibreCat-ID: 2180
T. Beisel, T. Wiersema, C. Plessl, and A. Brinkmann, “Programming and Scheduling Model for Supporting Heterogeneous Accelerators in Linux,” 2012.
LibreCat
2012 | Journal Article | LibreCat-ID: 2177
M. Grad and C. Plessl, “On the Feasibility and Limitations of Just-In-Time Instruction Set Extension for FPGA-based Reconfigurable Processors,” Int. Journal of Reconfigurable Computing (IJRC), 2012, doi: 10.1155/2012/418315.
LibreCat
| DOI
2011 | Conference Paper | LibreCat-ID: 2191
T. Kenter, C. Plessl, M. Platzner, and M. Kauschke, “Estimation and Partitioning for CPU-Accelerator Architectures,” in Intel European Research and Innovation Conference, 2011.
LibreCat
2011 | Book Chapter | LibreCat-ID: 2202
C. Plessl and M. Platzner, “Hardware Virtualization on Dynamically Reconfigurable Embedded Processors,” in Reconfigurable Embedded Control Systems: Applications for Flexibility and Agility, M. Khalgui and H.-M. Hanisch, Eds. Hershey, PA, USA: IGI Global, 2011.
LibreCat
| DOI
2011 | Book Chapter | LibreCat-ID: 10737
L. Sekanina, J. A. Walker, P. Kaufmann, C. Plessl, and M. Platzner, “Evolution of Electronic Circuits,” in Cartesian Genetic Programming, Springer Berlin Heidelberg, 2011, pp. 125–179.
LibreCat
2011 | Conference Paper | LibreCat-ID: 2194
B. Meyer, C. Plessl, and J. Förstner, “Transformation of scientific algorithms to parallel computing code: subdomain support in a MPI-multi-GPU backend,” in Symp. on Application Accelerators in High Performance Computing (SAAHPC), 2011, pp. 60–63, doi: 10.1109/SAAHPC.2011.12.
LibreCat
| DOI
2011 | Conference Paper | LibreCat-ID: 2193
T. Beisel, T. Wiersema, C. Plessl, and A. Brinkmann, “Cooperative multitasking for heterogeneous accelerators in the Linux Completely Fair Scheduler,” in Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP), 2011, pp. 223–226, doi: 10.1109/ASAP.2011.6043273.
LibreCat
| DOI
2011 | Conference Paper | LibreCat-ID: 656
M. Happe, A. Agne, and C. Plessl, “Measuring and Predicting Temperature Distributions on FPGAs at Run-Time,” in Proceedings of the 2011 International Conference on Reconfigurable Computing and FPGAs (ReConFig), 2011, pp. 55–60, doi: 10.1109/ReConFig.2011.59.
LibreCat
| Files available
| DOI
2011 | Conference Paper | LibreCat-ID: 2200
T. Kenter, M. Platzner, C. Plessl, and M. Kauschke, “Performance Estimation Framework for Automated Exploration of CPU-Accelerator Architectures,” in Proc. Int. Symp. on Field-Programmable Gate Arrays (FPGA), 2011, pp. 177–180, doi: 10.1145/1950413.1950448.
LibreCat
| DOI
2011 | Journal Article | LibreCat-ID: 2201
T. Schumacher, T. Süß, C. Plessl, and M. Platzner, “FPGA Acceleration of Communication-bound Streaming Applications: Architecture Modeling and a 3D Image Compositing Case Study,” Int. Journal of Recon- figurable Computing (IJRC), 2011, doi: 10.1155/2011/760954.
LibreCat
| DOI
2011 | Conference Paper | LibreCat-ID: 2198
M. Grad and C. Plessl, “Just-in-time Instruction Set Extension – Feasibility and Limitations for an FPGA-based Reconfigurable ASIP Architecture,” in Proc. Reconfigurable Architectures Workshop (RAW), 2011, pp. 278–285, doi: 10.1109/IPDPS.2011.153.
LibreCat
| DOI
2010 | Conference Paper | LibreCat-ID: 2223
E. Lübbers, M. Platzner, C. Plessl, A. Keller, and B. Plattner, “Towards Adaptive Networking for Embedded Devices based on Reconfigurable Hardware,” in Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 2010, pp. 225–231.
LibreCat
2010 | Conference Paper | LibreCat-ID: 2216
M. Grad and C. Plessl, “Pruning the Design Space for Just-In-Time Processor Customization,” in Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig), 2010, pp. 67–72, doi: 10.1109/ReConFig.2010.19.
LibreCat
| DOI
2010 | Conference Paper | LibreCat-ID: 2224
M. Grad and C. Plessl, “An Open Source Circuit Library with Benchmarking Facilities,” in Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 2010, pp. 144–150.
LibreCat
2010 | Conference Paper | LibreCat-ID: 2220
D. Andrews and C. Plessl, “Configurable Processor Architectures: History and Trends,” in Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 2010, p. 165.
LibreCat
2010 | Conference (Editor) | LibreCat-ID: 2222
T. P. Plaks et al., Eds., Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA). CSREA Press, 2010.
LibreCat
2010 | Conference Paper | LibreCat-ID: 2226
T. Beisel, M. Niekamp, and C. Plessl, “Using Shared Library Interposing for Transparent Acceleration in Systems with Heterogeneous Hardware Accelerators,” in Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP), 2010, pp. 65–72, doi: 10.1109/ASAP.2010.5540798.
LibreCat
| DOI
2010 | Conference Paper | LibreCat-ID: 2206
A. Keller, B. Plattner, E. Lübbers, M. Platzner, and C. Plessl, “Reconfigurable Nodes for Future Networks,” in Proc. IEEE Globecom Workshop on Network of the Future (FutureNet), 2010, pp. 372–376, doi: 10.1109/GLOCOMW.2010.5700341.
LibreCat
| DOI
2010 | Conference Paper | LibreCat-ID: 2227
M. Woehrle, C. Plessl, and L. Thiele, “Rupeas: Ruby Powered Event Analysis DSL,” in Proc. Int. Conf. Networked Sensing Systems (INSS), 2010, pp. 245–248, doi: 10.1109/INSS.2010.5572211.
LibreCat
| DOI
2010 | Conference Paper | LibreCat-ID: 2228
T. Kenter, M. Platzner, C. Plessl, and M. Kauschke, “Performance Estimation for the Exploration of CPU-Accelerator Architectures,” in Proc. Workshop on Architectural Research Prototyping (WARP), International Symposium on Computer Architecture (ISCA), 2010.
LibreCat
2009 | Report | LibreCat-ID: 2353
M. Woehrle, C. Plessl, and L. Thiele, Rupeas: Ruby Powered Event Analysis DSL. Computer Engineering and Networks Lab, ETH Zurich, 2009.
LibreCat
2009 | Conference Paper | LibreCat-ID: 2350
T. Schumacher, C. Plessl, and M. Platzner, “IMORC: Application Mapping, Monitoring and Optimization for High-Performance Reconfigurable Computing,” in Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM), 2009, pp. 275–278, doi: 10.1109/FCCM.2009.25.
LibreCat
| DOI
2009 | Conference Paper | LibreCat-ID: 2262
P. Kaufmann, C. Plessl, and M. Platzner, “EvoCaches: Application-specific Adaptation of Cache Mapping,” in Proc. NASA/ESA Conference on Adaptive Hardware and Systems (AHS), 2009, pp. 11–18.
LibreCat
2009 | Conference Paper | LibreCat-ID: 2352
J. Beutel et al., “PermaDAQ: A Scientific Instrument for Precision Sensing and Data Recovery in Environmental Extremes,” in Proc. Int. Conf. on Information Processing in Sensor Networks (IPSN), 2009, pp. 265–276.
LibreCat
2009 | Conference Paper | LibreCat-ID: 2238
T. Schumacher, T. Süß, C. Plessl, and M. Platzner, “Communication Performance Characterization for Reconfigurable Accelerator Design on the XD1000,” in Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig), 2009, pp. 119–124, doi: 10.1109/ReConFig.2009.32.
LibreCat
| DOI
2009 | Conference Paper | LibreCat-ID: 2261
T. Schumacher, C. Plessl, and M. Platzner, “An Accelerator for k-th Nearest Neighbor Thinning Based on the IMORC Infrastructure,” in Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), 2009, pp. 338–344.
LibreCat
2009 | Conference Paper | LibreCat-ID: 2263
M. Grad and C. Plessl, “Woolcano: An Architecture and Tool Flow for Dynamic Instruction Set Extension on Xilinx Virtex-4 FX,” in Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 2009, pp. 319–322.
LibreCat
2008 | Conference Paper | LibreCat-ID: 2370
M. Woehrle, C. Plessl, R. Lim, J. Beutel, and L. Thiele, “EvAnT: Analysis and Checking of event traces for Wireless Sensor Networks,” in IEEE Int. Conf. on Sensor Networks, Ubiquitous, and Trustworthy Computing (SUTC), 2008, pp. 201–208, doi: 10.1109/SUTC.2008.24.
LibreCat
| DOI
2008 | Conference Paper | LibreCat-ID: 2364
T. Schumacher, R. Meiche, P. Kaufmann, E. Lübbers, C. Plessl, and M. Platzner, “A Hardware Accelerator for k-th Nearest Neighbor Thinning,” in Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 2008, pp. 245–251.
LibreCat
2008 | Conference Paper | LibreCat-ID: 2372
T. Schumacher, C. Plessl, and M. Platzner, “IMORC: An infrastructure for performance monitoring and optimization of reconfigurable computers,” 2008.
LibreCat
2007 | Report | LibreCat-ID: 2394
J. Beutel, C. Plessl, and M. Woehrle, Increasing the Reliability of Wireless Sensor Networks with a Unit Testing Framework. Computer Engineering and Networks Laboratory, ETH Zurich, 2007.
LibreCat
2007 | Conference Paper | LibreCat-ID: 2392
M. Woehrle, C. Plessl, J. Beutel, and L. Thiele, “Increasing the Reliability of Wireless Sensor Networks with a Distributed Testing Framework,” in Proc. Workshop on Embedded Networked Sensors (EmNets), 2007, pp. 93–97, doi: 10.1145/1278972.1278996.
LibreCat
| DOI
2007 | Conference Paper | LibreCat-ID: 2393
J. Beutel et al., “Automated Wireless Sensor Network Testing,” in Proc. Int. Conf. Networked Sensing Systems (INSS), 2007, pp. 303–303, doi: 10.1109/INSS.2007.4297445.
LibreCat
| DOI
2004 | Conference Paper | LibreCat-ID: 2415
C. Plessl and M. Platzner, “Virtualization of Hardware – Introduction and Survey,” in Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 2004, pp. 63–69.
LibreCat
2003 | Conference Paper | LibreCat-ID: 2422
R. Enzler, C. Plessl, and M. Platzner, “Co-simulation of a Hybrid Multi-Context Architecture,” in Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 2003, pp. 174–180.
LibreCat
2001 | Conference Paper | LibreCat-ID: 2428
C. Plessl and M. Platzner, “Instance-Specific Accelerators for Minimum Covering,” in Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 2001, pp. 85–91.
LibreCat
2001 | Journal Article | LibreCat-ID: 2429
C. Plessl and E. Wilde, “Server-Side-Techniken im Web – ein Überblick,” iX, pp. 88–93, 2001.
LibreCat
2001 | Mastersthesis | LibreCat-ID: 2430
C. Plessl, Reconfigurable Accelerators for Minimum Covering. Computer Engineering and Networks Lab, ETH Zurich, Switzerland, 2001.
LibreCat
2001 | Conference Paper | LibreCat-ID: 2432
R. Enzler, M. Platzner, C. Plessl, L. Thiele, and G. Tröster, “Reconfigurable Processors for Handhelds and Wearables: Application Analysis,” in Reconfigurable Technology: FPGAs and Reconfigurable Processors for Computing and Communications III, 2001, vol. 4525, pp. 135–146.
LibreCat
| DOI
2000 | Mastersthesis | LibreCat-ID: 2433
C. Plessl and S. Maurer, Hardware/Software Codesign in Speech Compression Applications. Computer Engineering and Networks Lab, ETH Zurich, Switzerland, 2000.
LibreCat