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146 Publications
2018 | Conference Paper | LibreCat-ID: 1590
Lass M, Mohr S, Wiebeler H, Kühne T, Plessl C. A Massively Parallel Algorithm for the Approximate Calculation of Inverse p-th Roots of Large Sparse Matrices. In: Proc. Platform for Advanced Scientific Computing (PASC) Conference. ACM; 2018. doi:10.1145/3218176.3218231
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| DOI
| arXiv
2018 | Conference Paper | LibreCat-ID: 1204
Riebler H, Vaz GF, Kenter T, Plessl C. Automated Code Acceleration Targeting Heterogeneous OpenCL Devices. In: Proc. ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming (PPoPP). ACM; 2018. doi:10.1145/3178487.3178534
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| DOI
2017 | Journal Article | LibreCat-ID: 18
Riebler H, Lass M, Mittendorf R, Löcke T, Plessl C. Efficient Branch and Bound on FPGAs Using Work Stealing and Instance-Specific Designs. ACM Transactions on Reconfigurable Technology and Systems (TRETS). 2017;10(3):24:1-24:23. doi:10.1145/3053687
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| DOI
2017 | Conference Paper | LibreCat-ID: 1592
Kenter T, Förstner J, Plessl C. Flexible FPGA design for FDTD using OpenCL. In: Proc. Int. Conf. on Field Programmable Logic and Applications (FPL). IEEE; 2017. doi:10.23919/FPL.2017.8056844
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2017 | Journal Article | LibreCat-ID: 1589
Schumacher J, Plessl C, Vandelli W. High-Throughput and Low-Latency Network Communication with NetIO. Journal of Physics: Conference Series. 2017;898. doi:10.1088/1742-6596/898/8/082003
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2016 | Conference Paper | LibreCat-ID: 19
Lass M, Leibenger D, Sorge C. Confidentiality and Authenticity for Distributed Version Control Systems - A Mercurial Extension. In: Proc. 41st Conference on Local Computer Networks (LCN). IEEE; 2016. doi:10.1109/lcn.2016.11
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| DOI
2016 | Mastersthesis | LibreCat-ID: 5418
Tölke C. Sicherheit von Hybriden FPGA-Systemen in Der Industriellen Automatisierungstechnik -- Anforderungen Und Umsetzung. Universität Paderborn; 2016.
LibreCat
2016 | Mastersthesis | LibreCat-ID: 5420
Wüllrich G. Dynamic OpenCL Task Scheduling for Energy and Performance in a Heterogeneous Environment. Universität Paderborn; 2016.
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2016 | Dissertation | LibreCat-ID: 161
Kenter T. Reconfigurable Accelerators in the World of General-Purpose Computing. Universität Paderborn; 2016.
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| Files available
2016 | Book Chapter | LibreCat-ID: 29
Agne A, Platzner M, Plessl C, Happe M, Lübbers E. ReconOS. In: Koch D, Hannig F, Ziener D, eds. FPGAs for Software Programmers. Springer International Publishing; 2016:227-244. doi:10.1007/978-3-319-26408-0_13
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2016 | Conference Paper | LibreCat-ID: 31
Riebler H, Vaz GF, Plessl C, Trainiti EMG, Durelli GC, Bolchini C. Using Just-in-Time Code Generation for Transparent Resource Management in Heterogeneous Systems. In: Proc. HiPEAC Workshop on Reonfigurable Computing (WRC). ; 2016.
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2016 | Conference Paper | LibreCat-ID: 24
Kenter T, Plessl C. Microdisk Cavity FDTD Simulation on FPGA using OpenCL. In: Proc. Workshop on Heterogeneous High-Performance Reconfigurable Computing (H2RC). ; 2016.
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| Files available
2016 | Conference Paper | LibreCat-ID: 25
Lass M, Kühne T, Plessl C. Using Approximate Computing in Scientific Codes. In: Workshop on Approximate Computing (AC). ; 2016.
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2016 | Conference Paper | LibreCat-ID: 138
Riebler H, Vaz GF, Plessl C, et al. Using Just-in-Time Code Generation for Transparent Resource Management in Heterogeneous Systems. In: Proceedings of International Forum on Research and Technologies for Society and Industry (RTSI). IEEE; 2016:1-5. doi:10.1109/RTSI.2016.7740545
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2016 | Book Chapter | LibreCat-ID: 156
Agne A, Happe M, Lösch A, Plessl C, Platzner M. Self-aware Compute Nodes. In: Self-Aware Computing Systems. Natural Computing Series (NCS). Springer International Publishing; 2016:145-165. doi:10.1007/978-3-319-39675-0_8
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2016 | Journal Article | LibreCat-ID: 165
Vaz GF, Riebler H, Kenter T, Plessl C. Potential and Methods for Embedding Dynamic Offloading Decisions into Application Code. Computers and Electrical Engineering. 2016;55:91-111. doi:10.1016/j.compeleceng.2016.04.021
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2016 | Conference Paper | LibreCat-ID: 168
Lösch A, Beisel T, Kenter T, Plessl C, Platzner M. Performance-centric scheduling with task migration for a heterogeneous compute node in the data center. In: Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition (DATE). EDA Consortium / IEEE; 2016:912-917.
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| Files available
2016 | Conference Paper | LibreCat-ID: 171
Kenter T, Vaz GF, Riebler H, Plessl C. Opportunities for deferring application partitioning and accelerator synthesis to runtime (extended abstract). In: Workshop on Reconfigurable Computing (WRC). ; 2016.
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| Files available
2015 | Journal Article | LibreCat-ID: 1772
Torresen J, Plessl C, Yao X. Self-Aware and Self-Expressive Systems – Guest Editor’s Introduction. IEEE Computer. 2015;48(7):18-20. doi:10.1109/MC.2015.205
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2015 | Mastersthesis | LibreCat-ID: 1794
Lass M. Localization and Analysis of Code Paths Suitable for Acceleration Using Approximate Computing. Paderborn: Paderborn University; 2015.
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