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427 Publications


2016 | Book Chapter | LibreCat-ID: 156
Agne, A., Happe, M., Lösch, A., Plessl, C., & Platzner, M. (2016). Self-aware Compute Nodes. In Self-aware Computing Systems (pp. 145–165). Springer International Publishing. https://doi.org/10.1007/978-3-319-39675-0_8
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2016 | Conference Paper | LibreCat-ID: 168
Lösch, A., Beisel, T., Kenter, T., Plessl, C., & Platzner, M. (2016). Performance-centric scheduling with task migration for a heterogeneous compute node in the data center. Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition (DATE), 912–917.
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2015 | Conference Paper | LibreCat-ID: 269
Wiersema, T., Wu, S., & Platzner, M. (2015). On-The-Fly Verification of Reconfigurable Image Processing Modules based on a Proof-Carrying Hardware Approach. In Proceedings of the International Symposium in Reconfigurable Computing (ARC) (pp. 365--372). https://doi.org/10.1007/978-3-319-16214-0_32
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2015 | Bachelorsthesis | LibreCat-ID: 3364
Knorr, C. (2015). Evaluation von Bildverarbeitungsalgorithmen in heterogenen Rechenknoten. Universität Paderborn.
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2015 | Journal Article | LibreCat-ID: 1772
Torresen, J., Plessl, C., & Yao, X. (2015). Self-Aware and Self-Expressive Systems – Guest Editor’s Introduction. IEEE Computer, 48(7), 18–20. https://doi.org/10.1109/MC.2015.205
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2015 | Mastersthesis | LibreCat-ID: 10615
Ahmed, A. F. (2015). Self-Optimizing Organic Cache. Paderborn University.
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2015 | Dissertation | LibreCat-ID: 10624
Beisel, T. (2015). Management and Scheduling of Accelerators for Heterogeneous High-Performance Computing. Berlin: Logos Verlag Berlin GmbH.
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2015 | Mastersthesis | LibreCat-ID: 10668
Hangmann, H. (2015). Evolution of Heat Flow Prediction Models for FPGA Devices. Paderborn University.
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2015 | Mastersthesis | LibreCat-ID: 10671
Haupt, C. (2015). Computer Vision basierte Klassifikation von HD EMG Signalen. Paderborn University.
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2015 | Conference Paper | LibreCat-ID: 10673
Ho, N., Ahmed, A. F., Kaufmann, P., & Platzner, M. (2015). Microarchitectural optimization by means of reconfigurable and evolvable cache mappings. In Proc. NASA/ESA Conf. Adaptive Hardware and Systems (AHS) (pp. 1–7). https://doi.org/10.1109/AHS.2015.7231178
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