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410 Publications


2014 | Conference Paper | LibreCat-ID: 1782
Graf T, Schaefers L, Platzner M. On Semeai Detection in Monte-Carlo Go. In: Proc. Conf. on Computers and Games (CG). Lecture Notes in Computer Science. Switzerland: Springer; 2014:14-25. doi:10.1007/978-3-319-09165-5_2
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2014 | Conference Paper | LibreCat-ID: 399
Wiersema T, Drzevitzky S, Platzner M. Memory Security in Reconfigurable Computers: Combining Formal Verification with Monitoring. In: Proceedings of the International Conference on Field-Programmable Technology (FPT). ; 2014:167-174. doi:10.1109/FPT.2014.7082771
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2014 | Conference Paper | LibreCat-ID: 406
Kenter T, Schmitz H, Plessl C. Kernel-Centric Acceleration of High Accuracy Stereo-Matching. In: Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig). IEEE; 2014:1-8. doi:10.1109/ReConFig.2014.7032535
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2014 | Conference Paper | LibreCat-ID: 408
Jakobs M-C, Platzner M, Wiersema T, Wehrheim H. Integrating Software and Hardware Verification. In: Albert E, Sekerinski E, eds. Proceedings of the 11th International Conference on Integrated Formal Methods (IFM). LNCS. ; 2014:307-322. doi:10.1007/978-3-319-10181-1_19
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2014 | Conference Paper | LibreCat-ID: 433
Wiersema T, Bockhorn A, Platzner M. Embedding FPGA Overlays into Configurable Systems-on-Chip: ReconOS meets ZUMA. In: Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig). ; 2014:1-6. doi:10.1109/ReConFig.2014.7032514
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2014 | Conference Paper | LibreCat-ID: 439
Vaz GF, Riebler H, Kenter T, Plessl C. Deferring Accelerator Offloading Decisions to Application Runtime. In: Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig). IEEE; 2014:1-8. doi:10.1109/ReConFig.2014.7032509
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2014 | Journal Article | LibreCat-ID: 10602
Schaefers L, Platzner M. A Novel Technique and its Application to Computer Go. IEEE Transactions on Computational Intelligence and AI in Games. 2014;6(3):361-374. doi:10.1109/TCIAIG.2014.2346997
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2014 | Journal Article | LibreCat-ID: 10603
Giefers H, Platzner M. An FPGA-based Reconfigurable Mesh Many-Core. IEEE Transactions on Computers. 2014;63(12):2919-2932. doi:10.1109/TC.2013.174
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2014 | Conference Paper | LibreCat-ID: 10621
Anwer J, Platzner M, Meisner S. FPGA Redundancy Configurations: An Automated Design Space Exploration. In: Reconfigurable Architectures Workshop (RAW). RAW. ; 2014. doi:10.1109/IPDPSW.2014.37
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2014 | Bachelorsthesis | LibreCat-ID: 10627
Bockhorn A. Echtzeit Klassifikation von SEMG Signalen Mit Einem Low-Cost DSP Evaluation Board. Paderborn University; 2014.
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