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404 Publications


2002 | Journal Article | LibreCat-ID: 10651
Eisenring M, Platzner M. A Framework for Run-time Reconfigurable Systems. The Journal of Supercomputing. 2002;21(2):145-159. doi:10.1023/a:1013627403946
LibreCat | DOI
 

2002 | Conference Paper | LibreCat-ID: 13611
Walder H, Platzner M. Non-preemptive Multitasking on FPGAs: Task Placement and Footprint Transform. In: Proceedings of the 2nd International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA). CSREA Press; 2002:24-30.
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2001 | Conference Paper | LibreCat-ID: 2428
Plessl C, Platzner M. Instance-Specific Accelerators for Minimum Covering. In: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA). CSREA Press; 2001:85-91.
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2001 | Conference Paper | LibreCat-ID: 2432
Enzler R, Platzner M, Plessl C, Thiele L, Tröster G. Reconfigurable Processors for Handhelds and Wearables: Application Analysis. In: Reconfigurable Technology: FPGAs and Reconfigurable Processors for Computing and Communications III. Vol 4525. Proc. SPIE. ; 2001:135-146. doi:10.1117/12.434376
LibreCat | DOI
 

2001 | Journal Article | LibreCat-ID: 10713
Mencer O, Platzner M, Morf M, J. Flynn M. Object-oriented domain specific compilers for programming FPGAs. {IEEE} Transactions on Very Large Scale Integration ({VLSI}) Systems. 2001;9(1):205-210. doi:10.1109/92.920835
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2001 | Misc | LibreCat-ID: 13463
Enzler R, Platzner M. Dynamically Reconfigurable Processors. TELEMATIK, Zeitschrift des Telematik-Ingebieur-Verbandes 7(1); 2001.
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2000 | Journal Article | LibreCat-ID: 6507
Platzner M. Reconfigurable accelerators for combinatorial problems. Computer. 2000;33(4):58-60. doi:10.1109/2.839322
LibreCat | DOI
 

2000 | Journal Article | LibreCat-ID: 10606
Eisenring M, Platzner M. Synthesis of Interfaces and Communication in Reconfigurable Embedded Systems. IEE Proceedings -- Computers & Digital Techniques. 2000;147:159-165. doi:10.1049/ip-cdt:20000496
LibreCat | DOI
 

2000 | Journal Article | LibreCat-ID: 10725
Platzner M, Rinner B, Weiss R. Toward embedded qualitative simulation: a specialized computer architecture for QSim. IEEE Intelligent Systems. 2000;15(2):62-68. doi:10.1109/5254.850829
LibreCat | DOI
 

2000 | Conference Paper | LibreCat-ID: 13609
Eisenring MH, Platzner M. An Implementation Framework for Run-time Reconfigurable Systems. In: Proceedings of the 2nd International Workshop on Engineering of Reconfigurable Hardware/Software Objects (ENREGLE). CSREA Press; 2000:151-157.
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