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422 Publications
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- 2 (current)
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2017 | Conference Paper | LibreCat-ID: 10676
N. Ho, P. Kaufmann, and M. Platzner, “Evolvable caches: Optimization of reconfigurable cache mappings for a LEON3/Linux-based multi-core processor,” in 2017 International Conference on Field Programmable Technology (ICFPT), 2017, pp. 215–218.
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2017 | Journal Article | LibreCat-ID: 10692
C. Shen, P. Kaufmann, and M. Braun, “Three-Stage Power System Restoration Methodology Considering Renewable Energies,” Elsevier International Journal of Electrical Power and Energy Systems (IJEPES), 2017.
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2017 | Mastersthesis | LibreCat-ID: 10708
A. Dietrich, Reconfigurable Cryptographic Services. Paderborn University, 2017.
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2017 | Book | LibreCat-ID: 10759
G. Squillero et al., Applications of Evolutionary Computation - 20th European Conference, EvoApplications. Springer, 2017.
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2017 | Conference Paper | LibreCat-ID: 10780
Z. Guettatfi, P. Hübner, M. Platzner, and B. Rinner, “Computational self-awareness as design approach for visual sensor nodes,” in 12th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC), 2017, pp. 1–8.
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2016 | Journal Article | LibreCat-ID: 222
T. Wiersema, A. Bockhorn, and M. Platzner, “An Architecture and Design Tool Flow for Embedding a Virtual FPGA into a Reconfigurable System-on-Chip,” Computers & Electrical Engineering, pp. 112--122, 2016.
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2016 | Mastersthesis | LibreCat-ID: 10612
J. Cedric Mertens, Sprint Diagnostic with RTK-GPS \& IMU Sensor Fusion. Paderborn University, 2016.
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2016 | Mastersthesis | LibreCat-ID: 10616
A. S. Nassery, Implementation of Bilinear Pairings on Reconfigurable Hardware. Paderborn University, 2016.
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2016 | Mastersthesis | LibreCat-ID: 10617
O. Amin, Acceleration of EMTP for Distribution Networks on Data Flow Machines using the Latency Insertion Method. Paderborn University, 2016.
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2016 | Conference Paper | LibreCat-ID: 10631
A. Boschmann, S. Dosen, A. Werner, A. Raies, and D. Farina, “A novel immersive augmented reality system for prosthesis training and assessment,” in Proc. IEEE Int. Conf. Biomed. Health Informatics (BHI), 2016.
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2016 | Bachelorsthesis | LibreCat-ID: 10695
J. Horstmann, Beschleunigte Simulation elektrischer Stromnetze mit GPUs. Paderborn University, 2016.
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2016 | Mastersthesis | LibreCat-ID: 10706
V. Makeswaran, Operating System Support for Reconfigurable Cache. Paderborn University, 2016.
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2016 | Mastersthesis | LibreCat-ID: 10707
I. Ibne Ashraf, Private/Shared Data Classification and Implementation for a Multi-Softcore Platform. Paderborn University, 2016.
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2016 | Bachelorsthesis | LibreCat-ID: 10755
M. Schmidt, Konzeption und Implementierung einer digitalen Ansteuerung für den Betrieb einer elektrischen Sendereinheit für induktive Energieübertragung. Paderborn University, 2016.
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2016 | Book | LibreCat-ID: 10758
G. Squillero et al., Applications of Evolutionary Computation - 19th European Conference, EvoApplications, vol. 9597. Springer, 2016.
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2016 | Conference Paper | LibreCat-ID: 10766
I. Ghribi, R. Ben Abdallah, M. Khalgui, and M. Platzner, “RCo-Design: New Visual Environment for Reconfigurable Embedded Systems,” in Proceedings of the 30th European Simulation and Modelling Conference (ESM), 2016.
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2016 | Conference Paper | LibreCat-ID: 10768
I. Ghribi, R. Ben Abdallah, M. Khalgui, and M. Platzner, “New Co-design Methodology for Real-time Embedded Systems,” in Proceedings of the 11th International Conference on Software Engineering and Applications (ICSOFT-EA), 2016, pp. 185–195.
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2016 | Journal Article | LibreCat-ID: 10769
H. Ghasemzadeh Mohammadi, P.-E. Gaillardon, and G. De Micheli, “Efficient Statistical Parameter Selection for Nonlinear Modeling of Process/Performance Variation,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. PP, no. 99, pp. 1–1, 2016.
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2016 | Bachelorsthesis | LibreCat-ID: 10781
S. Hermansen, Custom Memory Controller for ReconOS. Paderborn University, 2016.
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2016 | Conference Paper | LibreCat-ID: 15873
A. Boschmann, A. Agne, L. M. Witschen, G. Thombansen, F. Kraus, and M. Platzner, “FPGA-based acceleration of high density myoelectric signal processing,” in 2015 International Conference on ReConFigurable Computing and FPGAs (ReConFig), Mexiko City, Mexiko, 2016.
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2016 | Conference Paper | LibreCat-ID: 13151
T. Graf and M. Platzner, “Using Deep Convolutional Neural Networks in Monte Carlo Tree Search,” in Computer and Games, 2016.
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2016 | Conference Paper | LibreCat-ID: 13152
T. Graf and M. Platzner, “Monte-Carlo Simulation Balancing Revisited,” in IEEE Computational Intelligence and Games, 2016.
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2016 | Conference Paper | LibreCat-ID: 132
T. Wiersema and M. Platzner, “Verifying Worst-Case Completion Times for Reconfigurable Hardware Modules using Proof-Carrying Hardware,” in Proceedings of the 11th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC 2016), 2016, pp. 1--8.
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2016 | Book Chapter | LibreCat-ID: 156
A. Agne, M. Happe, A. Lösch, C. Plessl, and M. Platzner, “Self-aware Compute Nodes,” in Self-aware Computing Systems, Cham: Springer International Publishing, 2016, pp. 145–165.
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2016 | Conference Paper | LibreCat-ID: 168
A. Lösch, T. Beisel, T. Kenter, C. Plessl, and M. Platzner, “Performance-centric scheduling with task migration for a heterogeneous compute node in the data center,” in Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2016, pp. 912–917.
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2015 | Conference Paper | LibreCat-ID: 269
T. Wiersema, S. Wu, and M. Platzner, “On-The-Fly Verification of Reconfigurable Image Processing Modules based on a Proof-Carrying Hardware Approach,” in Proceedings of the International Symposium in Reconfigurable Computing (ARC), 2015, pp. 365--372.
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2015 | Bachelorsthesis | LibreCat-ID: 3364
C. Knorr, Evaluation von Bildverarbeitungsalgorithmen in heterogenen Rechenknoten. Universität Paderborn, 2015.
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2015 | Journal Article | LibreCat-ID: 1772
J. Torresen, C. Plessl, and X. Yao, “Self-Aware and Self-Expressive Systems – Guest Editor’s Introduction,” IEEE Computer, vol. 48, no. 7, pp. 18–20, 2015.
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2015 | Mastersthesis | LibreCat-ID: 10615
A. F. Ahmed, Self-Optimizing Organic Cache. Paderborn University, 2015.
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2015 | Dissertation | LibreCat-ID: 10624
T. Beisel, Management and Scheduling of Accelerators for Heterogeneous High-Performance Computing. Berlin: Logos Verlag Berlin GmbH, 2015.
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2015 | Mastersthesis | LibreCat-ID: 10668
H. Hangmann, Evolution of Heat Flow Prediction Models for FPGA Devices. Paderborn University, 2015.
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2015 | Mastersthesis | LibreCat-ID: 10671
C. Haupt, Computer Vision basierte Klassifikation von HD EMG Signalen. Paderborn University, 2015.
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2015 | Conference Paper | LibreCat-ID: 10693
P. Kaufmann and C. Shen, “Generator Start-up Sequences Optimization for Network Restoration Using Genetic Algorithm and Simulated Annealing,” in Genetic and Evolutionary Computation (GECCO), 2015, pp. 409–416.
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2015 | Bachelorsthesis | LibreCat-ID: 10714
R. Meißner, Konzept und Implementation einer Benutzeroberfläche zur Generierung virtueller FPGAs. Universität Paderborn, 2015.
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2015 | Mastersthesis | LibreCat-ID: 10726
T. Posewsky, Acceleration of Artificial Neural Networks on a Zynq Platform. Paderborn University, 2015.
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2015 | Book | LibreCat-ID: 10757
A. M. Mora et al., Applications of Evolutionary Computation - 18th European Conference, EvoApplications, vol. 9028. Copenhagen, Denmark: Springer, 2015.
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2015 | Conference Paper | LibreCat-ID: 10767
I. Ghribi, R. Ben Abdallah, M. Khalgui, and M. Platzner, “New Codesign Solutions for Modelling and Partitioning of Probabilistic Reconfigurable Embedded Software,” in Proceedings of the 29th European Simulation and Modelling Conference (ESM), 2015.
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2015 | Conference Paper | LibreCat-ID: 10771
H. Ghasemzadeh Mohammadi, P.-E. Gaillardon, J. Zhang, G. De Micheli, E. Sanchez, and M. S. Reorda, “On the design of a fault tolerant ripple-carry adder with controllable-polarity transistors,” in 2015 IEEE Computer Society Annual Symposium on VLSI, 2015, pp. 491–496.
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2015 | Conference Paper | LibreCat-ID: 13153
T. Graf and M. Platzner, “Adaptive Playouts in Monte-Carlo Tree Search with Policy-Gradient Reinforcement Learning,” in Advances in Computer Games: 14th International Conference, ACG 2015, Leiden, The Netherlands, July 1-3, 2015, Revised Selected Papers, 2015, pp. 1–11.
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2015 | Journal Article | LibreCat-ID: 296
T. Kenter, H. Schmitz, and C. Plessl, “Exploring Tradeoffs between Specialized Kernels and a Reusable Overlay in a Stereo-Matching Case Study,” International Journal of Reconfigurable Computing (IJRC), vol. 2015, Art. no. 859425, 2015, doi: 10.1155/2015/859425.
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2015 | Conference Paper | LibreCat-ID: 303 |

M. Damschen and C. Plessl, “Easy-to-Use On-The-Fly Binary Program Acceleration on Many-Cores,” 2015.
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2015 | Conference Paper | LibreCat-ID: 1773
J. Schumacher et al., “Improving Packet Processing Performance in the ATLAS FELIX Project – Analysis and Optimization of a Memory-Bounded Algorithm,” 2015, doi: 10.1145/2675743.2771824.
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2015 | Journal Article | LibreCat-ID: 1768
C. Plessl, M. Platzner, and P. J. Schreier, “Aktuelles Schlagwort: Approximate Computing,” Informatik Spektrum, no. 5, pp. 396–399, 2015, doi: 10.1007/s00287-015-0911-z.
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2015 | Conference Paper | LibreCat-ID: 238
M. Damschen, H. Riebler, G. F. Vaz, and C. Plessl, “Transparent offloading of computational hotspots from binary code to Xeon Phi,” in Proceedings of the 2015 Conference on Design, Automation and Test in Europe (DATE), 2015, pp. 1078–1083, doi: 10.7873/DATE.2015.1124.
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2014 | Conference Paper | LibreCat-ID: 347
S. Meisner and M. Platzner, “Thread Shadowing: Using Dynamic Redundancy on Hybrid Multi-cores for Error Detection,” in Proceedings of the 10th International Symposium on Applied Reconfigurable Computing (ARC), 2014, pp. 283–290.
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2014 | Conference Paper | LibreCat-ID: 399
T. Wiersema, S. Drzevitzky, and M. Platzner, “Memory Security in Reconfigurable Computers: Combining Formal Verification with Monitoring,” in Proceedings of the International Conference on Field-Programmable Technology (FPT), 2014, pp. 167–174.
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2014 | Conference Paper | LibreCat-ID: 408
M.-C. Jakobs, M. Platzner, T. Wiersema, and H. Wehrheim, “Integrating Software and Hardware Verification,” in Proceedings of the 11th International Conference on Integrated Formal Methods (iFM), 2014, pp. 307–322.
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2014 | Conference Paper | LibreCat-ID: 433
T. Wiersema, A. Bockhorn, and M. Platzner, “Embedding FPGA Overlays into Configurable Systems-on-Chip: ReconOS meets ZUMA,” in Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), 2014, pp. 1–6.
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2014 | Bachelorsthesis | LibreCat-ID: 10627
A. Bockhorn, Echtzeit Klassifikation von sEMG Signalen mit einem low-cost DSP Evaluation Board. Paderborn University, 2014.
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2014 | Conference Paper | LibreCat-ID: 10632
A. Boschmann and M. Platzner, “A computer vision-based approach to high density EMG pattern recognition using structural similarity,” in Proc. MyoElectric Controls Symposium (MEC), 2014.
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2014 | Conference Paper | LibreCat-ID: 10633
A. Boschmann and M. Platzner, “Towards robust HD EMG pattern recognition: Reducing electrode displacement effect using structural similarity,” in Proc. IEEE Int. Conf. Eng. Med. Biolog. (EMBC), 2014.
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2014 | Mastersthesis | LibreCat-ID: 10640
M. Brand, A Generalized Loop Accelerator Implemented as a Coarse-Grained Array. Paderborn University, 2014.
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2014 | Mastersthesis | LibreCat-ID: 10645
M. Damschen, Easy-to-use-on-the-fly binary program acceleration on many-cores. Paderborn University, 2014.
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2014 | Conference Paper | LibreCat-ID: 10654
K. Glette and P. Kaufmann, “Lookup Table Partial Reconfiguration for an Evolvable Hardware Classifier System,” in IEEE Congress on Evolutionary Computation (CEC), 2014.
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2014 | Bachelorsthesis | LibreCat-ID: 10665
C. Hagedorn, Entwicklung einer codegrößenoptimierten Softwarebibliothek für 8-Bit Mikrocontroller in netzunabhängigen Notleuchten. Paderborn University, 2014.
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2014 | Bachelorsthesis | LibreCat-ID: 10679
F. König, EMG-basierte simultane und proportionale Online-Steuerung einer virtuellen Prothese. Paderborn University, 2014.
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2014 | Mastersthesis | LibreCat-ID: 10701
B. Koch, Hardware Acceleration of Mechatronic Controllers on a Zynq Platform FPGA. Paderborn University, 2014.
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2014 | Mastersthesis | LibreCat-ID: 10715
R. Mittendorf, Advanced AES-key recovery from decayed RAM using multi-threading and FPGAs. Paderborn University, 2014.
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2014 | Bachelorsthesis | LibreCat-ID: 10732
C. Rüthing, The Xilinx Zynq Architecture as a Platform for Reconfigurable Heterogeneous Multi-Cores. Paderborn University, 2014.
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2014 | Dissertation | LibreCat-ID: 10733
L. Schäfers, Parallel Monte-Carlo Tree Search for HPC Systems and its Application to Computer Go. Berlin: Logos Verlag Berlin GmbH, 2014.
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2014 | Conference Paper | LibreCat-ID: 10738
C. Shen, P. Kaufmann, and M. Braun, “Optimizing the Generator Start-up Sequence After a Power System Blackout,” in IEEE Power and Energy Society General Meeting (IEEE GM), 2014.
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2014 | Conference Paper | LibreCat-ID: 10739
C. Shen, P. Kaufmann, and M. Braun, “A New Distribution Network Reconfiguration and Restoration Path Selection Algorithm,” in Power Systems Computation Conference (PSCC), 2014.
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2014 | Mastersthesis | LibreCat-ID: 10744
S. Surmund, Multithreaded Parallelization of Mechatronic Controllers on a Zynq Platform FPGA. Paderborn University, 2014.
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2014 | Book | LibreCat-ID: 10756
A. I. Esparcia-Alc{\’a}zar et al., Applications of Evolutionary Computation - 17th European Conference, EvoApplications, vol. 8602. Granada, Spain: Springer, 2014.
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2014 | Conference Paper | LibreCat-ID: 10773
H. Ghasemzadeh Mohammadi, P.-E. Gaillardon, M. Yazdani, and G. De Micheli, “Fast process variation analysis in nano-scaled technologies using column-wise sparse parameter selection,” in 2014 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH), 2014, pp. 163–168.
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2014 | Book Chapter | LibreCat-ID: 335
M. Platzner and C. Plessl, “Verschiebungen an der Grenze zwischen Hardware und Software,” in Logiken strukturbildender Prozesse: Automatismen, J. Künsemöller, N. O. Eke, L. Foit, and T. Kaerlein, Eds. Paderborn: Wilhelm Fink, 2014, pp. 123–144.
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2014 | Conference Paper | LibreCat-ID: 388
T. Kenter, G. F. Vaz, and C. Plessl, “Partitioning and Vectorizing Binary Applications for a Reconfigurable Vector Computer,” in Proceedings of the International Symposium on Reconfigurable Computing: Architectures, Tools, and Applications (ARC), 2014, vol. 8405, pp. 144–155, doi: 10.1007/978-3-319-05960-0_13.
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2014 | Journal Article | LibreCat-ID: 363
A. Agne, H. Hangmann, M. Happe, M. Platzner, and C. Plessl, “Seven Recipes for Setting Your FPGA on Fire – A Cookbook on Heat Generators,” Microprocessors and Microsystems, vol. 38, no. 8, Part B, pp. 911–919, 2014, doi: 10.1016/j.micpro.2013.12.001.
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2014 | Conference Paper | LibreCat-ID: 377
H. Riebler, T. Kenter, C. Plessl, and C. Sorge, “Reconstructing AES Key Schedules from Decayed Memory with FPGAs,” in Proceedings of Field-Programmable Custom Computing Machines (FCCM), 2014, pp. 222–229, doi: 10.1109/FCCM.2014.67.
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2014 | Journal Article | LibreCat-ID: 365
A. Agne, M. Happe, A. Lösch, C. Plessl, and M. Platzner, “Self-awareness as a Model for Designing and Operating Heterogeneous Multicores,” ACM Transactions on Reconfigurable Technology and Systems (TRETS), vol. 7, no. 2, Art. no. 13, 2014, doi: 10.1145/2617596.
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2014 | Journal Article | LibreCat-ID: 328
A. Agne et al., “ReconOS - An Operating System Approach for Reconfigurable Computing,” IEEE Micro, vol. 34, no. 1, pp. 60–71, 2014, doi: 10.1109/MM.2013.110.
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2014 | Conference Paper | LibreCat-ID: 1778
G. C. Durelli et al., “Runtime Resource Management in Heterogeneous System Architectures: The SAVE Approach,” in Proc. Int. Symp. on Parallel and Distributed Processing with Applications (ISPA), 2014, pp. 142–149, doi: 10.1109/ISPA.2014.27.
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2014 | Conference Paper | LibreCat-ID: 439
G. F. Vaz, H. Riebler, T. Kenter, and C. Plessl, “Deferring Accelerator Offloading Decisions to Application Runtime,” in Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), 2014, pp. 1–8, doi: 10.1109/ReConFig.2014.7032509.
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2014 | Conference Paper | LibreCat-ID: 406
T. Kenter, H. Schmitz, and C. Plessl, “Kernel-Centric Acceleration of High Accuracy Stereo-Matching,” in Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), 2014, pp. 1–8, doi: 10.1109/ReConFig.2014.7032535.
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