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426 Publications


2010 | Conference Paper | LibreCat-ID: 13642
Giefers H, Platzner M. A Self-Reconfigurable Lightweight Interconnect for Scalable Processor Fabrics. In: Proceedings of the 10th International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA). CSREA Press; 2010.
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2010 | Conference Paper | LibreCat-ID: 2223
Lübbers E, Platzner M, Plessl C, Keller A, Plattner B. Towards Adaptive Networking for Embedded Devices based on Reconfigurable Hardware. In: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA). CSREA Press; 2010:225-231.
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2010 | Conference Paper | LibreCat-ID: 2216
Grad M, Plessl C. Pruning the Design Space for Just-In-Time Processor Customization. In: Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig). IEEE Computer Society; 2010:67-72. doi:10.1109/ReConFig.2010.19
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2010 | Conference Paper | LibreCat-ID: 2224
Grad M, Plessl C. An Open Source Circuit Library with Benchmarking Facilities. In: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA). CSREA Press; 2010:144-150.
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2010 | Conference Paper | LibreCat-ID: 2220
Andrews D, Plessl C. Configurable Processor Architectures: History and Trends. In: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA). CSREA Press; 2010:165.
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2010 | Conference (Editor) | LibreCat-ID: 2222
Plaks TP, Andrews D, DeMara R, et al., eds. Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA). CSREA Press; 2010.
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2010 | Conference Paper | LibreCat-ID: 2226
Beisel T, Niekamp M, Plessl C. Using Shared Library Interposing for Transparent Acceleration in Systems with Heterogeneous Hardware Accelerators. In: Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP). IEEE Computer Society; 2010:65-72. doi:10.1109/ASAP.2010.5540798
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2010 | Conference Paper | LibreCat-ID: 2206
Keller A, Plattner B, Lübbers E, Platzner M, Plessl C. Reconfigurable Nodes for Future Networks. In: Proc. IEEE Globecom Workshop on Network of the Future (FutureNet). IEEE; 2010:372-376. doi:10.1109/GLOCOMW.2010.5700341
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2010 | Conference Paper | LibreCat-ID: 2228
Kenter T, Platzner M, Plessl C, Kauschke M. Performance Estimation for the Exploration of CPU-Accelerator Architectures. In: Hammami O, Larrabee S, eds. Proc. Workshop on Architectural Research Prototyping (WARP), International Symposium on Computer Architecture (ISCA). ; 2010.
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2009 | Conference Paper | LibreCat-ID: 10639
Boschmann A, Kaufmann P, Platzner M, Winkler M. Towards multi-movement hand prostheses: Combining adaptive classification with high precision sockets. In: Proc. Technically Assisted Rehabilitation (TAR). ; 2009.
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2009 | Mastersthesis | LibreCat-ID: 10702
Kostin A. Evolvable Robot Controller. Paderborn University; 2009.
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2009 | Journal Article | LibreCat-ID: 10703
Lübbers E, Platzner M. ReconOS: Multithreaded Programming for Reconfigurable Computers. ACM Transactions on Embedded Computing Systems. 2009;9(1):8:1-8:33. doi:10.1145/1596532.1596540
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2009 | Mastersthesis | LibreCat-ID: 10746
Tofall M. Compiler for a Custom Instruction Set CPU. Paderborn University; 2009.
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2009 | Mastersthesis | LibreCat-ID: 10749
Warkentin A. Coarse-Grained CGP Model Using Xilinx Virtex5 DSP48E Functional Units. Paderborn University; 2009.
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2009 | Bachelorsthesis | LibreCat-ID: 10753
Wildenhain B. Implementierung von Kryptographie-Hardwarebeschleunigern Für Das HW/SW-Betriebssystem ReconOS. Paderborn University; 2009.
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2009 | Conference Paper | LibreCat-ID: 10777
Ghasemzadeh Mohammadi H, Miremadi SG, Ejlali A. Signature Self Checking (SSC): A Low-Cost Reliable Control Logic for Pipelined Microprocessors. In: Dependable Computing (PRDC), 2009 IEEE Pacific Rim International Symposium On. IEEE; 2009:252-255. doi:10.1109/PRDC.2009.69
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2009 | Conference Paper | LibreCat-ID: 13632
Happe M, Lübbers E, Platzner M. A Multithreaded Framework for Sequential Monte Carlo Methods on CPU/FPGA Platforms. In: Proceedings of the International Workshop on Applied Reconfigurable Computing (ARC). Springer; 2009.
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2009 | Conference Paper | LibreCat-ID: 13634
Giefers H, Platzner M. Towards Models for Many-Cores: The Case for the Reconfigurable Mesh. In: Proceedings of the Workshop on Many-Cores, International Conference on Architecture of Computing Systems (ARCS). ; 2009.
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2009 | Conference Paper | LibreCat-ID: 13635
Giefers H, Platzner M. ARMLang: A Language and Compiler for Programming Reconfigurable Mesh Many-Cores. In: Reconfigurable Architectures Workshop (RAW), Proceedings of the International Parallel and Distributed Processing Symposium. IEEE; 2009.
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2009 | Conference Paper | LibreCat-ID: 13636
Lübbers E, Platzner M. Cooperative Multithreading in Dynamically Reconfigurable Systems. In: Proceedings of the 19th International Workshop on Field Programmable Logic and Applications (FPL) . IEEE; 2009.
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