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406 Publications


2007 | Mastersthesis | LibreCat-ID: 10623
Entwurf und Evaluation eines parallelen Verfahrens zur Bildrekonstruktion in der Positronen-Emissions-Tomographie auf Multi-Core-Architekturen
T. Beisel, Entwurf Und Evaluation Eines Parallelen Verfahrens Zur Bildrekonstruktion in Der Positronen-Emissions-Tomographie Auf Multi-Core-Architekturen, Paderborn University, 2007.
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2007 | Journal Article | LibreCat-ID: 10625
Dynamically Reconfigurable Architectures (editorial)
N. Bergmann, M. Platzner, J. Teich, {EURASIP} Journal on Embedded Systems 2007 (2007) 1–2.
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2007 | Bachelorsthesis | LibreCat-ID: 10643
Distributed Simulation of mobile Robots using EyeSim
T. Ceylan, C. Yalcin, Distributed Simulation of Mobile Robots Using EyeSim, Paderborn University, 2007.
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2007 | Journal Article | LibreCat-ID: 10646
Server-based execution of periodic tasks on dynamically reconfigurable hardware
K. Danne, R. Mühlenbernd, M. Platzner, IET Computers Digital Techniques 1 (2007) 295–302.
LibreCat | DOI
 

2007 | Mastersthesis | LibreCat-ID: 10647
A Comparison of Multi-Objective Evolutionary Algorithms for Automated Circuit Design and Optimization
B. Defo, A Comparison of Multi-Objective Evolutionary Algorithms for Automated Circuit Design and Optimization, Paderborn University, 2007.
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2007 | Mastersthesis | LibreCat-ID: 10648
Entwurf und Implementierung einer RocketIO-basierten Kommunikationsschnittstelle für Multi-FPGA Systeme
S. Döhre, Entwurf Und Implementierung Einer RocketIO-Basierten Kommunikationsschnittstelle Für Multi-FPGA Systeme, Paderborn University, 2007.
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2007 | Conference Paper | LibreCat-ID: 10689
Toward Self-adaptive Embedded Systems: Multi-objective Hardware Evolution
P. Kaufmann, M. Platzner, in: Architecture of Computing Systems (ARCS), Springer, 2007, pp. 199–208.
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2007 | Bachelorsthesis | LibreCat-ID: 10709
VHDL-Implementierung eines Clustering-Verfahrens für multikriterielle Optimierungsalgorithmen
R. Meiche, VHDL-Implementierung Eines Clustering-Verfahrens Für Multikriterielle Optimierungsalgorithmen, Paderborn University, 2007.
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2007 | Mastersthesis | LibreCat-ID: 10728
Bildverarbeitungs-Architekturen und -Bibliotheken für das rekonfigurierbare Betriebssystem ReconOS
W. Reisch, Bildverarbeitungs-Architekturen Und -Bibliotheken Für Das Rekonfigurierbare Betriebssystem ReconOS, Paderborn University, 2007.
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2007 | Mastersthesis | LibreCat-ID: 10729
Konzeption und Implementierung einer Microsoft Windows CE 5.0 Plattform für ein ARM-basiertes eingebettetes Rechnersystem
E. Rethmeier, Konzeption Und Implementierung Einer Microsoft Windows CE 5.0 Plattform Für Ein ARM-Basiertes Eingebettetes Rechnersystem, Paderborn University, 2007.
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2007 | Conference Paper | LibreCat-ID: 10735
Accelerating the Cube Cut Problem with an FPGA-Augmented Compute Cluster
T. Schumacher, E. Lübbers, P. Kaufmann, M. Platzner, in: Proceedings of the ParaFPGA Symposium, International Conference on Parallel Computing: Architectures, Algorithms and Applications (PARCO), IOS Press, 2007, pp. 749–756.
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2007 | Conference Paper | LibreCat-ID: 13627
A Many-Core Implementation Based on the Reconfigurable Mesh Model
H. Giefers, M. Platzner, in: Proceedings of the 17th International Conference on Field Programmable Logic and Applications (FPL), IEEE, 2007.
LibreCat | DOI
 

2007 | Conference Paper | LibreCat-ID: 13628
ReconOS: An RTOS Supporting Hard-and Software Threads
E. Lübbers, M. Platzner, in: Proceedings of the 17th International Conference on Field Programmable Logic and Applications (FPL), IEEE, 2007.
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2006 | Conference Paper | LibreCat-ID: 2401
Optimal Temporal Partitioning based on Slowdown and Retiming
C. Plessl, M. Platzner, L. Thiele, in: Proc. Int. Conf. on Field Programmable Technology (ICFPT), IEEE Computer Society, 2006, pp. 345–348.
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2006 | Conference Paper | LibreCat-ID: 10688
Multi-objective Intrinsic Hardware Evolution
P. Kaufmann, M. Platzner, in: Intl. Conf. Military Applications of Programmable Logic Devices (MAPLD), 2006.
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2006 | Bachelorsthesis | LibreCat-ID: 10716
FPGA-Implementierung eines server-basierten Schedulers für periodische Hardwaretasks
R. Mühlenbernd, FPGA-Implementierung Eines Server-Basierten Schedulers Für Periodische Hardwaretasks, Paderborn University, 2006.
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2006 | Conference Paper | LibreCat-ID: 13624
Executing Hardware Tasks on Dynamically Reconfigurable Devices under Real-time Conditions
K. Danne, R. Mühlenbernd, M. Platzner, in: Proceedings of the 16th International Conference on Field Programmable Logic and Applications (FPL), IEEE, 2006.
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2006 | Conference Paper | LibreCat-ID: 13625
An EDF Schedulability Test for Periodic Tasks on Reconfigurable Hardware Devices
K. Danne, M. Platzner, in: In ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES), 2006.
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2006 | Conference Paper | LibreCat-ID: 13626
Partitioned Scheduling of Periodic Real-time Tasks onto Reconfigurable Hardware
K. Danne, M. Platzner, in: Proceedings of the 13th Reconfigurable Architectures Workshop (RAW), IEEE CS Press, 2006.
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2005 | Conference Paper | LibreCat-ID: 2411
Zippy – A coarse-grained reconfigurable array with support for hardware virtualization
C. Plessl, M. Platzner, in: Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP), IEEE Computer Society, 2005, pp. 213–218.
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