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404 Publications


2002 | Journal Article | LibreCat-ID: 10651
Eisenring, Michael, and Marco Platzner. “A Framework for Run-Time Reconfigurable Systems.” The Journal of Supercomputing 21, no. 2 (2002): 145–59. https://doi.org/10.1023/a:1013627403946.
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2002 | Conference Paper | LibreCat-ID: 13611
Walder, Herbert, and Marco Platzner. “Non-Preemptive Multitasking on FPGAs: Task Placement and Footprint Transform.” In Proceedings of the 2nd International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA), 24–30. CSREA Press, 2002.
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2001 | Conference Paper | LibreCat-ID: 2428
Plessl, Christian, and Marco Platzner. “Instance-Specific Accelerators for Minimum Covering.” In Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 85–91. CSREA Press, 2001.
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2001 | Conference Paper | LibreCat-ID: 2432
Enzler, Rolf, Marco Platzner, Christian Plessl, Lothar Thiele, and Gerhard Tröster. “Reconfigurable Processors for Handhelds and Wearables: Application Analysis.” In Reconfigurable Technology: FPGAs and Reconfigurable Processors for Computing and Communications III, 4525:135–46. Proc. SPIE, 2001. https://doi.org/10.1117/12.434376.
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2001 | Journal Article | LibreCat-ID: 10713
Mencer, Oskar, Marco Platzner, Martin Morf, and Michael J. Flynn. “Object-Oriented Domain Specific Compilers for Programming FPGAs.” {IEEE} Transactions on Very Large Scale Integration ({VLSI}) Systems 9, no. 1 (2001): 205–10. https://doi.org/10.1109/92.920835.
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2001 | Misc | LibreCat-ID: 13463
Enzler, Rolf, and Marco Platzner. Dynamically Reconfigurable Processors. TELEMATIK, Zeitschrift des Telematik-Ingebieur-Verbandes 7(1), 2001.
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2000 | Journal Article | LibreCat-ID: 6507
Platzner, Marco. “Reconfigurable Accelerators for Combinatorial Problems.” Computer 33, no. 4 (2000): 58–60. https://doi.org/10.1109/2.839322.
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2000 | Journal Article | LibreCat-ID: 10606
Eisenring, Michael, and Marco Platzner. “Synthesis of Interfaces and Communication in Reconfigurable Embedded Systems.” IEE Proceedings -- Computers & Digital Techniques 147 (2000): 159–65. https://doi.org/10.1049/ip-cdt:20000496.
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2000 | Journal Article | LibreCat-ID: 10725
Platzner, Marco, Bernhard Rinner, and Reinhold Weiss. “Toward Embedded Qualitative Simulation: A Specialized Computer Architecture for QSim.” IEEE Intelligent Systems 15, no. 2 (2000): 62–68. https://doi.org/10.1109/5254.850829.
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2000 | Conference Paper | LibreCat-ID: 13609
Eisenring, Michael H., and Marco Platzner. “An Implementation Framework for Run-Time Reconfigurable Systems.” In Proceedings of the 2nd International Workshop on Engineering of Reconfigurable Hardware/Software Objects (ENREGLE), 151–57. CSREA Press, 2000.
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2000 | Conference Paper | LibreCat-ID: 13610
Eisenring, Michael, and Marco Platzner. “Optimization of Run-Time Reconfigurable Embedded Systems.” In Proceedings of the 10th International Workshop on Field Programmable Logic and Applications (FPL), 565–74. Springer, 2000.
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1999 | Conference Paper | LibreCat-ID: 13607
Mencer, Oskar, and Marco Platzner. “Dynamic Circuit Generation for Boolean Satisfiability in an Object-Oriented Design Environment.” In Proceedings of the 32nd Annual Hawaii International Conference on Systems Sciences (HICSS-32). IEEE CS Press, 1999. https://doi.org/10.1109/hicss.1999.772883.
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1999 | Conference Paper | LibreCat-ID: 13608
Eisenring, Michael, Marco Platzner, and Lothar Thiele. “Communication Synthesis for Reconfigurable Embedded Systems.” In Proceedings of the 9th International Workshop on Field Programmable Logic and Applications (FPL), 1673:205–14. LCS. Springer, 1999. https://doi.org/10.1007/978-3-540-48302-1_21.
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1998 | Journal Article | LibreCat-ID: 10607
Platzner, Marco. “Reconfigurable Computer Architectures.” E&i Elektrotechnik Und Informationstechnik 115 (1998): 143–48.
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1998 | Journal Article | LibreCat-ID: 10608
Platzner, Marco, and Bernhard Rinner. “Design and Implementation of a Parallel Constraint Satisfaction Algorithm.” International Journal of Computers & Their Applications 5 (1998): 106–16.
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1998 | Misc | LibreCat-ID: 13464
Platzner, Marco, Bernhard Rinner, and Reinhold Weiss. A Distributed Computer Architecture for Fast Qualitative Simulation . Texas Instruments, The Elite Yearbook 1997 - Digital Signal Processing Solutions from Europe’s leading Universities, 1998.
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1998 | Conference Paper | LibreCat-ID: 13606
Platzner, Marco, and Giovanni De Micheli. “Acceleration of Satisfiability Algorithms by Reconfigurable Hardware.” In Proceedings of the 8th International Workshop on Field Programmable Logic and Applications (FPL) , 69–78. LNCS. Berlin, Heidelberg: Springer , 1998. https://doi.org/10.1007/bfb0055234.
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1997 | Journal Article | LibreCat-ID: 10609
Platzner, Marco, Bernhard Rinner, and Reinhold Weiss. “A Computer Architecture to Support Qualitative Simulation in Industrial Applications.” E & i Elektrotechnik Und Informationstechnik 114 (1997): 13–18.
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1997 | Journal Article | LibreCat-ID: 10724
Platzner, Marco, Bernhard Rinner, and Reinhold Weiss. “Parallel Qualitative Simulation.” Simulation Practice and Theory 5, no. 7–8 (1997): 623–38. https://doi.org/10.1016/s0928-4869(97)00008-6.
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1997 | Conference Paper | LibreCat-ID: 13603
Platzner, Marco, and Liliane Peters. “Fast Signature Segmentation on a Multi-DSP Architecture.” In Proceedings of the SPIE: Conference on Parallel and Distributed Methods for Image Processing, Vol. 3166, 1997.
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