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427 Publications
2002 | Conference Paper | LibreCat-ID: 2423
Reconfigurable Hardware in Wearable Computing Nodes
C. Plessl, R. Enzler, H. Walder, J. Beutel, M. Platzner, L. Thiele, in: Proc. Int. Symp. on Wearable Computers (ISWC), IEEE Computer Society, 2002, pp. 215–222.
LibreCat
| DOI
C. Plessl, R. Enzler, H. Walder, J. Beutel, M. Platzner, L. Thiele, in: Proc. Int. Symp. on Wearable Computers (ISWC), IEEE Computer Society, 2002, pp. 215–222.
2002 | Conference Paper | LibreCat-ID: 2424
Partially Reconfigurable Cores for Xilinx Virtex
M. Dyer, C. Plessl, M. Platzner, in: Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), Springer, 2002, pp. 292–301.
LibreCat
| DOI
M. Dyer, C. Plessl, M. Platzner, in: Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), Springer, 2002, pp. 292–301.
2002 | Conference Paper | LibreCat-ID: 2425
Custom Computing Machines for the Set Covering Problem
C. Plessl, M. Platzner, in: Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM), IEEE Computer Society, 2002, pp. 163–172.
LibreCat
| DOI
C. Plessl, M. Platzner, in: Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM), IEEE Computer Society, 2002, pp. 163–172.
2002 | Journal Article | LibreCat-ID: 10651
A Framework for Run-time Reconfigurable Systems
M. Eisenring, M. Platzner, The Journal of Supercomputing 21 (2002) 145–159.
LibreCat
| DOI
M. Eisenring, M. Platzner, The Journal of Supercomputing 21 (2002) 145–159.
2002 | Conference Paper | LibreCat-ID: 13611
Non-preemptive Multitasking on FPGAs: Task Placement and Footprint Transform
H. Walder, M. Platzner, in: Proceedings of the 2nd International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2002, pp. 24–30.
LibreCat
H. Walder, M. Platzner, in: Proceedings of the 2nd International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2002, pp. 24–30.
2001 | Conference Paper | LibreCat-ID: 2428
Instance-Specific Accelerators for Minimum Covering
C. Plessl, M. Platzner, in: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2001, pp. 85–91.
LibreCat
C. Plessl, M. Platzner, in: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2001, pp. 85–91.
2001 | Conference Paper | LibreCat-ID: 2432
Reconfigurable Processors for Handhelds and Wearables: Application Analysis
R. Enzler, M. Platzner, C. Plessl, L. Thiele, G. Tröster, in: Reconfigurable Technology: FPGAs and Reconfigurable Processors for Computing and Communications III, 2001, pp. 135–146.
LibreCat
| DOI
R. Enzler, M. Platzner, C. Plessl, L. Thiele, G. Tröster, in: Reconfigurable Technology: FPGAs and Reconfigurable Processors for Computing and Communications III, 2001, pp. 135–146.
2001 | Journal Article | LibreCat-ID: 10713
Object-oriented domain specific compilers for programming FPGAs
O. Mencer, M. Platzner, M. Morf, M. J. Flynn, {IEEE} Transactions on Very Large Scale Integration ({VLSI}) Systems 9 (2001) 205–210.
LibreCat
| DOI
O. Mencer, M. Platzner, M. Morf, M. J. Flynn, {IEEE} Transactions on Very Large Scale Integration ({VLSI}) Systems 9 (2001) 205–210.
2001 | Misc | LibreCat-ID: 13463
Dynamically Reconfigurable Processors
R. Enzler, M. Platzner, Dynamically Reconfigurable Processors, TELEMATIK, Zeitschrift des Telematik-Ingebieur-Verbandes 7(1), 2001.
LibreCat
R. Enzler, M. Platzner, Dynamically Reconfigurable Processors, TELEMATIK, Zeitschrift des Telematik-Ingebieur-Verbandes 7(1), 2001.
2000 | Journal Article | LibreCat-ID: 6507
Reconfigurable accelerators for combinatorial problems
M. Platzner, Computer 33 (2000) 58–60.
LibreCat
| DOI
M. Platzner, Computer 33 (2000) 58–60.
2000 | Journal Article | LibreCat-ID: 10606
Synthesis of Interfaces and Communication in Reconfigurable Embedded Systems
M. Eisenring, M. Platzner, IEE Proceedings -- Computers & Digital Techniques 147 (2000) 159–165.
LibreCat
| DOI
M. Eisenring, M. Platzner, IEE Proceedings -- Computers & Digital Techniques 147 (2000) 159–165.
2000 | Journal Article | LibreCat-ID: 10725
Toward embedded qualitative simulation: a specialized computer architecture for QSim
M. Platzner, B. Rinner, R. Weiss, IEEE Intelligent Systems 15 (2000) 62–68.
LibreCat
| DOI
M. Platzner, B. Rinner, R. Weiss, IEEE Intelligent Systems 15 (2000) 62–68.
2000 | Conference Paper | LibreCat-ID: 13609
An Implementation Framework for Run-time Reconfigurable Systems
M.H. Eisenring, M. Platzner, in: Proceedings of the 2nd International Workshop on Engineering of Reconfigurable Hardware/Software Objects (ENREGLE), CSREA Press, 2000, pp. 151–157.
LibreCat
M.H. Eisenring, M. Platzner, in: Proceedings of the 2nd International Workshop on Engineering of Reconfigurable Hardware/Software Objects (ENREGLE), CSREA Press, 2000, pp. 151–157.
2000 | Conference Paper | LibreCat-ID: 13610
Optimization of Run-time Reconfigurable Embedded Systems
M. Eisenring, M. Platzner, in: Proceedings of the 10th International Workshop on Field Programmable Logic and Applications (FPL), Springer, 2000, pp. 565–574.
LibreCat
M. Eisenring, M. Platzner, in: Proceedings of the 10th International Workshop on Field Programmable Logic and Applications (FPL), Springer, 2000, pp. 565–574.
1999 | Conference Paper | LibreCat-ID: 13607
Dynamic circuit generation for Boolean satisfiability in an object-oriented design environment
O. Mencer, M. Platzner, in: Proceedings of the 32nd Annual Hawaii International Conference on Systems Sciences (HICSS-32), IEEE CS Press, 1999.
LibreCat
| DOI
O. Mencer, M. Platzner, in: Proceedings of the 32nd Annual Hawaii International Conference on Systems Sciences (HICSS-32), IEEE CS Press, 1999.
1999 | Conference Paper | LibreCat-ID: 13608
Communication Synthesis for Reconfigurable Embedded Systems
M. Eisenring, M. Platzner, L. Thiele, in: Proceedings of the 9th International Workshop on Field Programmable Logic and Applications (FPL), Springer, 1999, pp. 205–214.
LibreCat
| DOI
M. Eisenring, M. Platzner, L. Thiele, in: Proceedings of the 9th International Workshop on Field Programmable Logic and Applications (FPL), Springer, 1999, pp. 205–214.
1998 | Journal Article | LibreCat-ID: 10607
Reconfigurable Computer Architectures
M. Platzner, E&i Elektrotechnik Und Informationstechnik 115 (1998) 143–148.
LibreCat
M. Platzner, E&i Elektrotechnik Und Informationstechnik 115 (1998) 143–148.
1998 | Journal Article | LibreCat-ID: 10608
Design and Implementation of a Parallel Constraint Satisfaction Algorithm
M. Platzner, B. Rinner, International Journal of Computers & Their Applications 5 (1998) 106–116.
LibreCat
M. Platzner, B. Rinner, International Journal of Computers & Their Applications 5 (1998) 106–116.
1998 | Misc | LibreCat-ID: 13464
A Distributed Computer Architecture for Fast Qualitative Simulation
M. Platzner, B. Rinner, R. Weiss, A Distributed Computer Architecture for Fast Qualitative Simulation , Texas Instruments, The Elite Yearbook 1997 - Digital Signal Processing Solutions from Europe’s leading Universities, 1998.
LibreCat
M. Platzner, B. Rinner, R. Weiss, A Distributed Computer Architecture for Fast Qualitative Simulation , Texas Instruments, The Elite Yearbook 1997 - Digital Signal Processing Solutions from Europe’s leading Universities, 1998.
1998 | Conference Paper | LibreCat-ID: 13606
Acceleration of satisfiability algorithms by reconfigurable hardware
M. Platzner, G. De Micheli, in: Proceedings of the 8th International Workshop on Field Programmable Logic and Applications (FPL) , Springer , Berlin, Heidelberg, 1998, pp. 69–78.
LibreCat
| DOI
M. Platzner, G. De Micheli, in: Proceedings of the 8th International Workshop on Field Programmable Logic and Applications (FPL) , Springer , Berlin, Heidelberg, 1998, pp. 69–78.