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427 Publications
2000 | Journal Article | LibreCat-ID: 10606
Eisenring M, Platzner M. Synthesis of Interfaces and Communication in Reconfigurable Embedded Systems. IEE Proceedings -- Computers & Digital Techniques. 2000;147:159-165. doi:10.1049/ip-cdt:20000496
LibreCat
| DOI
2000 | Journal Article | LibreCat-ID: 10725
Platzner M, Rinner B, Weiss R. Toward embedded qualitative simulation: a specialized computer architecture for QSim. IEEE Intelligent Systems. 2000;15(2):62-68. doi:10.1109/5254.850829
LibreCat
| DOI
2000 | Conference Paper | LibreCat-ID: 13609
Eisenring MH, Platzner M. An Implementation Framework for Run-time Reconfigurable Systems. In: Proceedings of the 2nd International Workshop on Engineering of Reconfigurable Hardware/Software Objects (ENREGLE). CSREA Press; 2000:151-157.
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2000 | Conference Paper | LibreCat-ID: 13610
Eisenring M, Platzner M. Optimization of Run-time Reconfigurable Embedded Systems. In: Proceedings of the 10th International Workshop on Field Programmable Logic and Applications (FPL). Springer; 2000:565-574.
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1999 | Conference Paper | LibreCat-ID: 13607
Mencer O, Platzner M. Dynamic circuit generation for Boolean satisfiability in an object-oriented design environment. In: Proceedings of the 32nd Annual Hawaii International Conference on Systems Sciences (HICSS-32). IEEE CS Press; 1999. doi:10.1109/hicss.1999.772883
LibreCat
| DOI
1999 | Conference Paper | LibreCat-ID: 13608
Eisenring M, Platzner M, Thiele L. Communication Synthesis for Reconfigurable Embedded Systems. In: Proceedings of the 9th International Workshop on Field Programmable Logic and Applications (FPL). Vol 1673. LCS. Springer; 1999:205-214. doi:10.1007/978-3-540-48302-1_21
LibreCat
| DOI
1998 | Journal Article | LibreCat-ID: 10607
Platzner M. Reconfigurable Computer Architectures. e&i Elektrotechnik und Informationstechnik. 1998;115:143-148.
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1998 | Journal Article | LibreCat-ID: 10608
Platzner M, Rinner B. Design and Implementation of a Parallel Constraint Satisfaction Algorithm. International Journal of Computers & Their Applications. 1998;5:106-116.
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1998 | Misc | LibreCat-ID: 13464
Platzner M, Rinner B, Weiss R. A Distributed Computer Architecture for Fast Qualitative Simulation . Texas Instruments, The Elite Yearbook 1997 - Digital Signal Processing Solutions from Europe’s leading Universities; 1998:106-107.
LibreCat
1998 | Conference Paper | LibreCat-ID: 13606
Platzner M, De Micheli G. Acceleration of satisfiability algorithms by reconfigurable hardware. In: Proceedings of the 8th International Workshop on Field Programmable Logic and Applications (FPL) . LNCS. Berlin, Heidelberg: Springer ; 1998:69-78. doi:10.1007/bfb0055234
LibreCat
| DOI
1997 | Journal Article | LibreCat-ID: 10609
Platzner M, Rinner B, Weiss R. A Computer Architecture to Support Qualitative Simulation in Industrial Applications. e & i Elektrotechnik und Informationstechnik. 1997;114:13-18.
LibreCat
1997 | Journal Article | LibreCat-ID: 10724
Platzner M, Rinner B, Weiss R. Parallel qualitative simulation. Simulation Practice and Theory. 1997;5(7-8):623-638. doi:10.1016/s0928-4869(97)00008-6
LibreCat
| DOI
1997 | Conference Paper | LibreCat-ID: 13603
Platzner M, Peters L. Fast Signature Segmentation on a Multi-DSP Architecture. In: Proceedings of the SPIE: Conference on Parallel and Distributed Methods for Image Processing. Vol 3166. ; 1997.
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1997 | Conference Paper | LibreCat-ID: 13604
Röwekamp T, Platzner M, Peters L. Specialized Architectures for Optical Flow Computation: A Performance Comparison of ASIC, DSP, and Multi-DSP. In: Proceedings of the 8th International Conference on Signal Processing Applications & Technology (ICSPAT). ; 1997:829-833.
LibreCat
1996 | Conference Paper | LibreCat-ID: 13602
Lind E, Platzner M, Rinner B. A Multi-DSP System with Dynamically Reconfigurable Processors. In: Proceedings of the 7th International Conference on Signal Processing Applications & Technology (ICSPAT). ; 1996.
LibreCat
1995 | Journal Article | LibreCat-ID: 10610
Platzner M, Rinner B, Weiss R. Exploiting Parallelism in Constraint Satisfaction for Qualitative Simulation. JUCS Journal of Universal Computer Science. 1995;12:811-820.
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1995 | Conference Paper | LibreCat-ID: 13469
Platzner M, Rinner B, Weiss R. A Distributed Computer Architecture for Qualitative Simulation based on a Multi-DSP and FPGAs. In: Proceedings of the 3rd Euromicro Workshop on Parallel and Distributed Processing . IEEE CS Press; 1995:311-318.
LibreCat
1995 | Conference Paper | LibreCat-ID: 13470
Brenner E, Ginthör-Kalcsics R, Hranitzky R, et al. High-Performance Simulators Based on Multi-TMS320C40. In: Proceedings of the 5th Annual Texas Instruments TMS320 Educators Conference. ; 1995.
LibreCat
1995 | Conference Paper | LibreCat-ID: 13471
Friedl G, Platzner M, Rinner B. A Special-Purpose Coprocessor for Qualitative Simulation. In: Proceedings of the EURO-PAR’95 International Conference on Parallel Processing. Springer International Publishing; 1995:695-698.
LibreCat
1995 | Conference Paper | LibreCat-ID: 13472
Platzner M, Rinner B, Weiss R. Parallel Qualitative Simulation. In: Proceedings of the EUROSIM Congress. Elsevier; 1995:231-236.
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