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427 Publications
2019 | Mastersthesis | LibreCat-ID: 15883
Kumar Jeyakumar S. Incremental Learning with Support Vector Machine on Embedded Platforms.; 2019.
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2019 | Mastersthesis | LibreCat-ID: 15920
Keerthipati M. A Bitstream-Level Proof-Carrying Hardware Technique for Information Flow Tracking. Universität Paderborn; 2019.
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2019 | Mastersthesis | LibreCat-ID: 14831
Sabu NS. FPGA Acceleration of String Search Techniques in Huge Data Sets. Paderborn University; 2019.
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2019 | Mastersthesis | LibreCat-ID: 15946
Mehta J. Multithreaded Software/Hardware Programming with ReconOS/FreeRTOS on a Recongurable System-on-Chip.; 2019.
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2019 | Mastersthesis | LibreCat-ID: 14546
Hansmeier T. Autonomous Operation of High-Performance Compute Nodes through Self-Awareness and Learning Classifiers. Universität Paderborn; 2019.
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2019 | Conference Paper | LibreCat-ID: 31067
Guettatfi Z, Platzner M, Kermia O, Khouas A. An Approach for Mapping Periodic Real-Time Tasks to Reconfigurable Hardware. In: 2019 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW). IEEE; 2019. doi:10.1109/ipdpsw.2019.00027
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| DOI
2019 | Conference Paper | LibreCat-ID: 9913 | 
Ahmed QA, Wiersema T, Platzner M. Proof-Carrying Hardware Versus the Stealthy Malicious LUT Hardware Trojan. In: Hochberger C, Nelson B, Koch A, Woods R, Diniz P, eds. Applied Reconfigurable Computing. Vol 11444. Lecture Notes in Computer Science. Springer International Publishing; 2019:127-136. doi:10.1007/978-3-030-17227-5_10
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2019 | Mastersthesis | LibreCat-ID: 15874 |
Lienen C. Implementing a Real-Time System on a Platform FPGA Operated with ReconOS. Universität Paderborn
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2019 | Journal Article | LibreCat-ID: 12871 |
Platzner M, Plessl C. FPGAs im Rechenzentrum. Informatik Spektrum. Published online 2019. doi:10.1007/s00287-019-01187-w
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2019 | Mastersthesis | LibreCat-ID: 52478
Mehta JD. Multithreaded Software/Hardware Programming with ReconOS/FreeRTOS on a Reconfigurable System-on-Chip.; 2019.
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2018 | Conference Paper | LibreCat-ID: 3362
Lösch A, Wiens A, Platzner M. Ampehre: An Open Source Measurement Framework for Heterogeneous Compute Nodes. In: Proceedings of the International Conference on Architecture of Computing Systems (ARCS). Vol 10793. Lecture Notes in Computer Science. Cham: Springer International Publishing; 2018:73-84. doi:10.1007/978-3-319-77610-1_6
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2018 | Bachelorsthesis | LibreCat-ID: 3365
Schnuer J-P. Static Scheduling Algorithms for Heterogeneous Compute Nodes. Universität Paderborn; 2018.
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2018 | Bachelorsthesis | LibreCat-ID: 3366
Croce M. Evaluation of OpenCL-Based Compilation for FPGAs. Universität Paderborn; 2018.
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2018 | Conference Paper | LibreCat-ID: 3373
Hansmeier T, Platzner M, Andrews D. An FPGA/HMC-Based Accelerator for Resolution Proof Checking. In: ARC 2018: Applied Reconfigurable Computing. Architectures, Tools, and Applications. Vol 10824. Lecture Notes in Computer Science. Springer International Publishing; 2018:153-165. doi:10.1007/978-3-319-78890-6_13
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2018 | Preprint | LibreCat-ID: 3586
Witschen LM, Wiersema T, Ghasemzadeh Mohammadi H, Awais M, Platzner M. CIRCA: Towards a Modular and Extensible Framework for Approximate Circuit Generation. Third Workshop on Approximate Computing (AxC 2018).
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2018 | Dissertation | LibreCat-ID: 3720
Ho N. FPGA-Based Reconfigurable Cache Mapping Schemes: Design and Optimization. Universität Paderborn; 2018. doi:10.17619/UNIPB/1-376
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2018 | Preprint | LibreCat-ID: 1165
Witschen LM, Wiersema T, Platzner M. Making the Case for Proof-carrying Approximate Circuits. 4th Workshop On Approximate Computing (WAPCO 2018). 2018.
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2018 | Conference Paper | LibreCat-ID: 5547
Lösch A, Platzner M. A Highly Accurate Energy Model for Task Execution on Heterogeneous Compute Nodes. In: 2018 IEEE 29th International Conference on Application-Specific Systems, Architectures and Processors (ASAP). IEEE; 2018. doi:10.1109/asap.2018.8445098
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2018 | Conference Paper | LibreCat-ID: 10598
Awais M, Ghasemzadeh Mohammadi H, Platzner M. An MCTS-based Framework for Synthesis of Approximate Circuits. In: 26th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC). ; 2018:219-224. doi:10.1109/VLSI-SoC.2018.8645026
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2018 | Mastersthesis | LibreCat-ID: 10782
Clausing L. Development of a Hardware / Software Codesign for Sonification of LIDAR-Based Sensor Data. Ruhr-University Bochum; 2018.
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