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380 Publications


2021 | Conference Paper | LibreCat-ID: 20681
Ahmed QA, Wiersema T, Platzner M. Malicious Routing: Circumventing Bitstream-level Verification for FPGAs. In: Alpexpo | Grenoble, France: 2021 Design, Automation and Test in Europe Conference (DATE).
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2021 | Conference Paper | LibreCat-ID: 21610
Awais M, Ghasemzadeh Mohammadi H, Platzner M. LDAX: A Learning-based Fast Design Space Exploration Framework for Approximate Circuit Synthesis. In: Proceedings of the ACM Great Lakes Symposium on VLSI.
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2020 | Journal Article | LibreCat-ID: 15836
Bellman K, Dutt N, Esterle L, et al. Self-aware Cyber-Physical Systems. ACM Transactions on Cyber-Physical Systems. 2020;Accepted for Publication:1-24.
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2020 | Journal Article | LibreCat-ID: 17092
Anwer J, Meisner S, Platzner M. Dynamic Reliability Management for FPGA-Based Systems. International Journal of Reconfigurable Computing. 2020:1-19. doi:10.1155/2020/2808710
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2020 | Journal Article | LibreCat-ID: 17369
Ho N, Kaufmann P, Platzner M. Evolution of Application-Specific Cache Mappings. International Journal of Hybrid intelligent Systems. 2020.
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2020 | Journal Article | LibreCat-ID: 17358
Witschen LM, Wiersema T, Platzner M. Proof-carrying Approximate Circuits. IEEE Transactions On Very Large Scale Integration Systems. 2020;28(9):2084-2088. doi:10.1109/TVLSI.2020.3008061
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2020 | Preprint | LibreCat-ID: 20748
Witschen LM, Wiersema T, Platzner M. Search Space Characterization for AxC Synthesis. Fifth Workshop on Approximate Computing (AxC 2020).
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2020 | Bachelorsthesis | LibreCat-ID: 20820
Thiele S. Implementing Machine Learning Functions as PYNQ FPGA Overlays.; 2020.
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2020 | Conference Paper | LibreCat-ID: 20750
Lienen C, Platzner M, Rinner B. ReconROS: Flexible Hardware Acceleration for ROS2 Applications. In: Proceedings of the 2020 International Conference on Field-Programmable Technology (FPT). ; 2020.
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2020 | Conference Paper | LibreCat-ID: 3583
Guetttatfi Z, Kaufmann P, Platzner M. Optimal and Greedy Heuristic Approaches for Scheduling and Mapping of Hardware Tasks to Reconfigurable Computing Devices. In: Proceedings of the International Workshop on Applied Reconfigurable Computing (ARC). ; 2020.
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2020 | Mastersthesis | LibreCat-ID: 20821
Jaganath V. Extension and Evaluation of Python-Based High-Level Synthesis Tool Flows.; 2020.
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2020 | Conference Paper | LibreCat-ID: 20838
Loesch A, Platzner M. MigHEFT: DAG-based Scheduling of Migratable Tasks on Heterogeneous Compute Nodes. In: 2020 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW). ; 2020. doi:10.1109/ipdpsw50202.2020.00012
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2020 | Mastersthesis | LibreCat-ID: 21324
Chandrakar K. Comparison of Feature Selection Techniques to Improve Approximate Circuit Synthesis.; 2020.
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2020 | Bachelorsthesis | LibreCat-ID: 21432
Henke L-S. Evaluation of a ReconOS-ROS Combination Based on a Video Processing Application.; 2020.
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2020 | Conference Paper | LibreCat-ID: 16363
Hansmeier T, Kaufmann P, Platzner M. Enabling XCSF to Cope with Dynamic Environments via an Adaptive Error Threshold. In: GECCO ’20: Proceedings of the Genetic and Evolutionary Computation Conference Companion. New York, NY, United States: Association for Computing Machinery (ACM); 2020:125-126. doi:10.1145/3377929.3389968
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2020 | Conference Paper | LibreCat-ID: 17063
Hansmeier T, Kaufmann P, Platzner M. An Adaption Mechanism for the Error Threshold of XCSF. In: GECCO ’20: Proceedings of the Genetic and Evolutionary Computation Conference Companion. New York, NY, United States: Association for Computing Machinery (ACM); 2020:1756-1764. doi:10.1145/3377929.3398106
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2020 | Conference Paper | LibreCat-ID: 16213
Awais M, Ghasemzadeh Mohammadi H, Platzner M. A Hybrid Synthesis Methodology for Approximate Circuits. In: Proceedings of the 30th ACM Great Lakes Symposium on VLSI (GLSVLSI) 2020. ACM; 2020:421-426. doi:10.1145/3386263.3406952
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2020 | Conference Paper | LibreCat-ID: 21584
Gatica CP, Platzner M. Adaptable Realization of Industrial Analytics Functions on Edge-Devices using Reconfigurable Architectures. In: Machine Learning for Cyber Physical Systems (ML4CPS 2017). Berlin, Heidelberg; 2020. doi:10.1007/978-3-662-59084-3_9
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2020 | Mastersthesis | LibreCat-ID: 21433
Jentzsch FP. Design and Implementation of a ReconOS-Based TensorFlow Lite Delegate Architecture.; 2020.
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2019 | Preprint | LibreCat-ID: 16853
Witschen LM, Ghasemzadeh Mohammadi H, Artmann M, Platzner M. Jump Search: A Fast Technique for the Synthesis of Approximate Circuits. Fourth Workshop on Approximate Computing (AxC 2019).
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2019 | Journal Article | LibreCat-ID: 3585
Witschen LM, Wiersema T, Ghasemzadeh Mohammadi H, Awais M, Platzner M. CIRCA: Towards a Modular and Extensible Framework for Approximate Circuit Generation. Microelectronics Reliability. 2019;99:277-290. doi:10.1016/j.microrel.2019.04.003
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2019 | Conference Paper | LibreCat-ID: 9913
Ahmed QA, Wiersema T, Platzner M. Proof-Carrying Hardware Versus the Stealthy Malicious LUT Hardware Trojan. In: Hochberger C, Nelson B, Koch A, Woods R, Diniz P, eds. Applied Reconfigurable Computing. Vol 11444. Lecture Notes in Computer Science. Cham: Springer International Publishing; 2019:127-136. doi:10.1007/978-3-030-17227-5_10
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2019 | Mastersthesis | LibreCat-ID: 15920
Keerthipati M. A Bitstream-Level Proof-Carrying Hardware Technique for Information Flow Tracking. Universität Paderborn; 2019.
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2019 | Mastersthesis | LibreCat-ID: 15874
Lienen C. Implementing a Real-Time System on a Platform FPGA Operated with ReconOS. Universität Paderborn
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2019 | Conference Paper | LibreCat-ID: 10577
Witschen LM, Ghasemzadeh Mohammadi H, Artmann M, Platzner M. Jump Search: A Fast Technique for the Synthesis of Approximate Circuits. In: Proceedings of the 2019 on Great Lakes Symposium on VLSI  - GLSVLSI ’19. New York, NY, USA: ACM; 2019. doi:10.1145/3299874.3317998
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2019 | Journal Article | LibreCat-ID: 11950
Boschmann A, Agne A, Thombansen G, Witschen LM, Kraus F, Platzner M. Zynq-based acceleration of robust high density myoelectric signal processing. Journal of Parallel and Distributed Computing. 2019;123:77-89. doi:10.1016/j.jpdc.2018.07.004
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2019 | Journal Article | LibreCat-ID: 12871
Platzner M, Plessl C. FPGAs im Rechenzentrum. Informatik Spektrum. 2019. doi:10.1007/s00287-019-01187-w
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2019 | Conference Paper | LibreCat-ID: 15422
Ho N, Kaufmann P, Platzner M. Optimization of Application-specific L1 Cache Translation Functions of the LEON3 Processor. In: World Congress on Nature and Biologically Inspired Computing (NaBIC). Advances in Nature and Biologically Inspired Computing. Springer; 2019.
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2019 | Mastersthesis | LibreCat-ID: 15883
Kumar Jeyakumar S. Incremental Learning with Support Vector Machine on Embedded Platforms.; 2019.
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2019 | Mastersthesis | LibreCat-ID: 15946
Mehta J. Multithreaded Software/Hardware Programming with ReconOS/FreeRTOS on a Recon􏰃gurable System-on-Chip.; 2019.
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2019 | Journal Article | LibreCat-ID: 12967
Hansmeier T, Platzner M, Pantho MJH, Andrews D. An Accelerator for Resolution Proof Checking based on FPGA and Hybrid Memory Cube Technology. Journal of Signal Processing Systems. 2019;91(11):1259-1272. doi:10.1007/s11265-018-1435-y
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2019 | Mastersthesis | LibreCat-ID: 14831
Sabu NS. FPGA Acceleration of String Search Techniques in Huge Data Sets. Paderborn University; 2019.
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2019 | Mastersthesis | LibreCat-ID: 14546
Hansmeier T. Autonomous Operation of High-Performance Compute Nodes through Self-Awareness and Learning Classifiers. Universität Paderborn; 2019.
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2018 | Dissertation | LibreCat-ID: 3720
Ho N. FPGA-Based Reconfigurable Cache Mapping Schemes: Design and Optimization. Universität Paderborn; 2018. doi:10.17619/UNIPB/1-376
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2018 | Bachelorsthesis | LibreCat-ID: 1097
Jentzsch FP. Enforcing IP Core Connection Properties with Verifiable Security Monitors. Universität Paderborn; 2018.
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2018 | Journal Article | LibreCat-ID: 12965
Ghribi I, Abdallah RB, Khalgui M, Li Z, Alnowibet K, Platzner M. R-Codesign: Codesign Methodology for Real-Time Reconfigurable Embedded Systems Under Energy Constraints. IEEE Access. 2018:14078-14092. doi:10.1109/access.2018.2799852
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2018 | Preprint | LibreCat-ID: 3586
Witschen LM, Wiersema T, Ghasemzadeh Mohammadi H, Awais M, Platzner M. CIRCA: Towards a Modular and Extensible Framework for Approximate Circuit Generation. Third Workshop on Approximate Computing (AxC 2018).
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2018 | Bachelorsthesis | LibreCat-ID: 3365
Schnuer J-P. Static Scheduling Algorithms for Heterogeneous Compute Nodes. Universität Paderborn; 2018.
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2018 | Mastersthesis | LibreCat-ID: 10782
Clausing L. Development of a Hardware / Software Codesign for Sonification of LIDAR-Based Sensor Data. Ruhr-University Bochum; 2018.
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2018 | Conference Paper | LibreCat-ID: 3373
Hansmeier T, Platzner M, Andrews D. An FPGA/HMC-Based Accelerator for Resolution Proof Checking. In: ARC 2018: Applied Reconfigurable Computing. Architectures, Tools, and Applications. Vol 10824. Lecture Notes in Computer Science. Springer International Publishing; 2018:153-165. doi:10.1007/978-3-319-78890-6_13
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2018 | Bachelorsthesis | LibreCat-ID: 3366
Croce M. Evaluation of OpenCL-Based Compilation for FPGAs. Universität Paderborn; 2018.
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2018 | Conference Paper | LibreCat-ID: 10598
Awais M, Ghasemzadeh Mohammadi H, Platzner M. An MCTS-based Framework for Synthesis of Approximate Circuits. In: 26th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC). ; 2018:219-224. doi:10.1109/VLSI-SoC.2018.8645026
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2018 | Conference Paper | LibreCat-ID: 3362
Lösch A, Wiens A, Platzner M. Ampehre: An Open Source Measurement Framework for Heterogeneous Compute Nodes. In: Proceedings of the International Conference on Architecture of Computing Systems (ARCS). Vol 10793. Lecture Notes in Computer Science. Cham: Springer International Publishing; 2018:73-84. doi:10.1007/978-3-319-77610-1_6
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2018 | Preprint | LibreCat-ID: 1165
Witschen LM, Wiersema T, Platzner M. Making the Case for Proof-carrying Approximate Circuits. 4th Workshop On Approximate Computing (WAPCO 2018). 2018.
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2018 | Conference Paper | LibreCat-ID: 5547
Lösch A, Platzner M. A Highly Accurate Energy Model for Task Execution on Heterogeneous Compute Nodes. In: 2018 IEEE 29th International Conference on Application-Specific Systems, Architectures and Processors (ASAP). IEEE; 2018. doi:10.1109/asap.2018.8445098
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2017 | Conference Paper | LibreCat-ID: 10780
Guettatfi Z, Hübner P, Platzner M, Rinner B. Computational self-awareness as design approach for visual sensor nodes. In: 12th International Symposium on Reconfigurable Communication-Centric Systems-on-Chip (ReCoSoC). ; 2017:1-8. doi:10.1109/ReCoSoC.2017.8016147
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2017 | Conference Paper | LibreCat-ID: 10672
Ho N, Ashraf II, Kaufmann P, Platzner M. Accurate Private/Shared Classification of Memory Accesses: a Run-time Analysis System for the LEON3 Multi-core Processor. In: Proc. Design, Automation and Test in Europe Conf. (DATE). ; 2017. doi:10.23919/DATE.2017.7927096
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2017 | Book | LibreCat-ID: 10759
Squillero G, Burelli P, M. Mora A, et al. Applications of Evolutionary Computation - 20th European Conference, EvoApplications. Springer; 2017.
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2017 | Conference Paper | LibreCat-ID: 10761
Kaufmann P, Ho N, Platzner M. Evaluation Methodology for Complex Non-deterministic Functions: A Case Study in Metaheuristic Optimization of Caches. In: Adaptive Hardware and Systems (AHS). IEEE; 2017. doi:10.1109/AHS.2017.8046380
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2017 | Bachelorsthesis | LibreCat-ID: 3580
Hansmeier T. An FPGA Accelerator for Checking Resolution Proofs. Universität Paderborn; 2017.
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