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7 Publications


2015 | Conference Paper | LibreCat-ID: 10673
Ho N, Ahmed AF, Kaufmann P, Platzner M. Microarchitectural optimization by means of reconfigurable and evolvable cache mappings. In: Proc. NASA/ESA Conf. Adaptive Hardware and Systems (AHS). ; 2015:1-7. doi:10.1109/AHS.2015.7231178
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2015 | Conference Paper | LibreCat-ID: 10779
Guettatfi Z, Kermia O, Khouas A. Over effective hard real-time hardware tasks scheduling and allocation. In: 25th International Conference on Field Programmable Logic and Applications (FPL). Imperial College; 2015. doi:10.1109/FPL.2015.7293994
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2014 | Conference Paper | LibreCat-ID: 10677
Ho N, Kaufmann P, Platzner M. Towards self-adaptive caches: A run-time reconfigurable multi-core infrastructure. In: 2014 {IEEE} Intl. Conf. on Evolvable Systems (ICES). ; 2014:31-37. doi:10.1109/ICES.2014.7008719
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2013 | Conference Paper | LibreCat-ID: 10620
Anwer J, Meisner S, Platzner M. Dynamic reliability management: Reconfiguring reliability-levels of hardware designs at runtime. In: Reconfigurable Computing and FPGAs (ReConFig), 2013 International Conference On. ; 2013:1-6. doi:10.1109/ReConFig.2013.6732280
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2010 | Conference Paper | LibreCat-ID: 37007
Mischkalla F, He D, Müller W. Closing the Gap between UML-based Modeling and Simulation of Combined HW/SW Systems. In: Proceedings of DATE’10. IEEE; 2010. doi:10.1109/DATE.2010.5456990
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2007 | Conference Paper | LibreCat-ID: 6508
Kaufmann P, Platzner M. MOVES: A Modular Framework for Hardware Evolution. In: Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007). IEEE; 2007:447-454. doi:10.1109/ahs.2007.73
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2005 | Conference Paper | LibreCat-ID: 39029
Schattkowsky T, Müller W, Rettberg A. A Model-Based Approach for Executable Specification on Reconfigurable Hardware. In: Proceedings of DATE’05. IEEE; 2005. doi:10.1109/DATE.2005.20
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