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5 Publications
2006 | Dissertation | LibreCat-ID: 2404
Plessl C. Hardware Virtualization on a Coarse-Grained Reconfigurable Processor. Aachen, Germany: Shaker Verlag; 2006. doi:10.2370/9783832255619
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| DOI
2005 | Conference Paper | LibreCat-ID: 2411
Plessl C, Platzner M. Zippy – A coarse-grained reconfigurable array with support for hardware virtualization. In: Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP). IEEE Computer Society; 2005:213-218. doi:10.1109/ASAP.2005.69
LibreCat
| DOI
2005 | Journal Article | LibreCat-ID: 2412
Enzler R, Plessl C, Platzner M. System-level performance evaluation of reconfigurable processors. Microprocessors and Microsystems. 2005;29(2-3):63-73. doi:10.1016/j.micpro.2004.06.004
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| DOI
2003 | Conference Paper | LibreCat-ID: 2421
Enzler R, Plessl C, Platzner M. Virtualizing Hardware with Multi-Context Reconfigurable Arrays. In: Proc. Int. Conf. on Field Programmable Logic and Applications (FPL). Vol 2778. Lecture Notes in Computer Science (LNCS). Springer; 2003:151-160. doi:10.1007/b12007
LibreCat
| DOI
2003 | Conference Paper | LibreCat-ID: 2422
Enzler R, Plessl C, Platzner M. Co-simulation of a Hybrid Multi-Context Architecture. In: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA). CSREA Press; 2003:174-180.
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