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25 Publications


2021 | Bachelorsthesis | LibreCat-ID: 22216
Rehnen, J. W. (2021). Decomposition of Arithmetic Components for the Approximate Circuit Synthesis with EvoApproxLib.
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2021 | Bachelorsthesis | LibreCat-ID: 22483
Brede, M. (2021). Implementation and Profiling of XCS in the Context of Embedded Systems. Paderborn: Paderborn University.
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2020 | Bachelorsthesis | LibreCat-ID: 20820
Thiele, S. (2020). Implementing Machine Learning Functions as PYNQ FPGA Overlays.
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2020 | Mastersthesis | LibreCat-ID: 20821
Jaganath, V. (2020). Extension and Evaluation of Python-based High-Level Synthesis Tool Flows.
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2020 | Mastersthesis | LibreCat-ID: 21324
Chandrakar, K. (2020). Comparison of Feature Selection Techniques to Improve Approximate Circuit Synthesis.
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2020 | Bachelorsthesis | LibreCat-ID: 21432
Henke, L.-S. (2020). Evaluation of a ReconOS-ROS Combination based on a Video Processing Application.
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2020 | Mastersthesis | LibreCat-ID: 21433
Jentzsch, F. P. (2020). Design and Implementation of a ReconOS-based TensorFlow Lite Delegate Architecture.
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2019 | Mastersthesis | LibreCat-ID: 15920
Keerthipati, M. (2019). A Bitstream-Level Proof-Carrying Hardware Technique for Information Flow Tracking. Universität Paderborn.
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2019 | Mastersthesis | LibreCat-ID: 15874
Lienen, C. (n.d.). Implementing a Real-time System on a Platform FPGA operated with ReconOS. Universität Paderborn.
LibreCat | Files available
 

2019 | Mastersthesis | LibreCat-ID: 14831
Sabu, N. S. (2019). FPGA Acceleration of String Search Techniques in Huge Data Sets. Paderborn University.
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