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25 Publications


2021 | Bachelorsthesis | LibreCat-ID: 22216
J. W. Rehnen, Decomposition of Arithmetic Components for the Approximate Circuit Synthesis with EvoApproxLib. 2021.
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2021 | Bachelorsthesis | LibreCat-ID: 22483
M. Brede, Implementation and Profiling of XCS in the Context of Embedded Systems. Paderborn: Paderborn University, 2021.
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2020 | Bachelorsthesis | LibreCat-ID: 20820
S. Thiele, Implementing Machine Learning Functions as PYNQ FPGA Overlays. 2020.
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2020 | Mastersthesis | LibreCat-ID: 20821
V. Jaganath, Extension and Evaluation of Python-based High-Level Synthesis Tool Flows. 2020.
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2020 | Mastersthesis | LibreCat-ID: 21324
K. Chandrakar, Comparison of Feature Selection Techniques to Improve Approximate Circuit Synthesis. 2020.
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2020 | Bachelorsthesis | LibreCat-ID: 21432
L.-S. Henke, Evaluation of a ReconOS-ROS Combination based on a Video Processing Application. 2020.
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2020 | Mastersthesis | LibreCat-ID: 21433
F. P. Jentzsch, Design and Implementation of a ReconOS-based TensorFlow Lite Delegate Architecture. 2020.
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2019 | Mastersthesis | LibreCat-ID: 15920
M. Keerthipati, A Bitstream-Level Proof-Carrying Hardware Technique for Information Flow Tracking. Universität Paderborn, 2019.
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2019 | Mastersthesis | LibreCat-ID: 15874
C. Lienen, Implementing a Real-time System on a Platform FPGA operated with ReconOS. Universität Paderborn.
LibreCat | Files available
 

2019 | Mastersthesis | LibreCat-ID: 14831
N. S. Sabu, FPGA Acceleration of String Search Techniques in Huge Data Sets. Paderborn University, 2019.
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