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25 Publications


2021 | Bachelorsthesis | LibreCat-ID: 22216
Rehnen, Jakob Werner. Decomposition of Arithmetic Components for the Approximate Circuit Synthesis with EvoApproxLib. 2021.
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2021 | Bachelorsthesis | LibreCat-ID: 22483
Brede, Mathis. Implementation and Profiling of XCS in the Context of Embedded Systems. Paderborn University, 2021.
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2020 | Bachelorsthesis | LibreCat-ID: 20820
Thiele, Simon. Implementing Machine Learning Functions as PYNQ FPGA Overlays. 2020.
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2020 | Mastersthesis | LibreCat-ID: 20821
Jaganath, Vivek. Extension and Evaluation of Python-Based High-Level Synthesis Tool Flows. 2020.
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2020 | Mastersthesis | LibreCat-ID: 21324
Chandrakar, Khushboo. Comparison of Feature Selection Techniques to Improve Approximate Circuit Synthesis. 2020.
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2020 | Bachelorsthesis | LibreCat-ID: 21432
Henke, Luca-Sebastian. Evaluation of a ReconOS-ROS Combination Based on a Video Processing Application. 2020.
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2020 | Mastersthesis | LibreCat-ID: 21433
Jentzsch, Felix P. Design and Implementation of a ReconOS-Based TensorFlow Lite Delegate Architecture. 2020.
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2019 | Mastersthesis | LibreCat-ID: 15920
Keerthipati, Monica. A Bitstream-Level Proof-Carrying Hardware Technique for Information Flow Tracking. Universität Paderborn, 2019.
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2019 | Mastersthesis | LibreCat-ID: 15874
Lienen, Christian. Implementing a Real-Time System on a Platform FPGA Operated with ReconOS. Universität Paderborn.
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2019 | Mastersthesis | LibreCat-ID: 14831
Sabu, Nithin S. FPGA Acceleration of String Search Techniques in Huge Data Sets. Paderborn University, 2019.
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2019 | Mastersthesis | LibreCat-ID: 14546
Hansmeier, Tim. Autonomous Operation of High-Performance Compute Nodes through Self-Awareness and Learning Classifiers. Universität Paderborn, 2019.
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2018 | Dissertation | LibreCat-ID: 3720
Ho, Nam. FPGA-Based Reconfigurable Cache Mapping Schemes: Design and Optimization. Universität Paderborn, 2018, doi:10.17619/UNIPB/1-376.
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2018 | Bachelorsthesis | LibreCat-ID: 3365
Schnuer, Jan-Philip. Static Scheduling Algorithms for Heterogeneous Compute Nodes. Universität Paderborn, 2018.
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2018 | Bachelorsthesis | LibreCat-ID: 3366
Croce, Marcel. Evaluation of OpenCL-Based Compilation for FPGAs. Universität Paderborn, 2018.
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2017 | Bachelorsthesis | LibreCat-ID: 3580
Hansmeier, Tim. An FPGA Accelerator for Checking Resolution Proofs. Universität Paderborn, 2017.
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2017 | Mastersthesis | LibreCat-ID: 74
Knorr, Christoph. OpenCL-basierte Videoverarbeitung auf heterogenen Rechenknoten. Universität Paderborn, 2017.
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2017 | Mastersthesis | LibreCat-ID: 1157
Witschen, Linus Matthias. A Framework for the Synthesis of Approximate Circuits. Universität Paderborn, 2017.
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2015 | Bachelorsthesis | LibreCat-ID: 3364
Knorr, Christoph. Evaluation von Bildverarbeitungsalgorithmen in heterogenen Rechenknoten. Universität Paderborn, 2015.
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2014 | Mastersthesis | LibreCat-ID: 10701
Koch, Benjamin. Hardware Acceleration of Mechatronic Controllers on a Zynq Platform FPGA. Paderborn University, 2014.
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2014 | Mastersthesis | LibreCat-ID: 10744
Surmund, Sebastian. Multithreaded Parallelization of Mechatronic Controllers on a Zynq Platform FPGA. Paderborn University, 2014.
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