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1355 Publications
2011 | Journal Article | LibreCat-ID: 46715
Motor expertise modulates the unconscious processing of human body postures
I. Güldenpenning, D. Koester, W. Kunde, M. Weigelt, T. Schack, Experimental Brain Research 213 (2011) 383–391.
LibreCat
| DOI
I. Güldenpenning, D. Koester, W. Kunde, M. Weigelt, T. Schack, Experimental Brain Research 213 (2011) 383–391.
2011 | Conference Abstract | LibreCat-ID: 46914
Neurophysiologische Korrelate der Wahrnehmungs-Handlungs-Kopplung am Beispiel des leichtathletischen Hochsprungs
D. Koester, I. Güldenpenning, T. Schack, in: K. Hottenrott, O. Stoll, R. Wollny (Eds.), Kreativität – Innovation – Leistung. 20. dvs- Hochschultag, Feldhaus Edition Czwalina, Hamburg, 2011, p. 66.
LibreCat
D. Koester, I. Güldenpenning, T. Schack, in: K. Hottenrott, O. Stoll, R. Wollny (Eds.), Kreativität – Innovation – Leistung. 20. dvs- Hochschultag, Feldhaus Edition Czwalina, Hamburg, 2011, p. 66.
2011 | Conference Abstract | LibreCat-ID: 20608
Effekte einer Jonglierintervention auf die kognitive Leistung und die Gehirnaktivität von Grundschülern
F. Koutsandreou, K. Reinecke, J. Schade, M. Cordes, M. Schubert, M. Kehne, A. Kämpfe, J. Baumeister, in: Kreativität - Innovation - Leistung, 2011.
LibreCat
F. Koutsandreou, K. Reinecke, J. Schade, M. Cordes, M. Schubert, M. Kehne, A. Kämpfe, J. Baumeister, in: Kreativität - Innovation - Leistung, 2011.
2011 | Conference Paper | LibreCat-ID: 44654
Studium heute: gesundheitsfördernd oder -gefährdend?: eine Lebensstilanalyse. Dokumentation 16. bundesweiter Kongress Armut und Gesundheit: 3./4. Dezember 2010 in Berlin
H.-P. Brandl-Bredenbeck, C. Köster, A. Kämpfe, in: 2011, pp. 1–10.
LibreCat
H.-P. Brandl-Bredenbeck, C. Köster, A. Kämpfe, in: 2011, pp. 1–10.
2011 | Conference Paper | LibreCat-ID: 2194
Transformation of scientific algorithms to parallel computing code: subdomain support in a MPI-multi-GPU backend
B. Meyer, C. Plessl, J. Förstner, in: Symp. on Application Accelerators in High Performance Computing (SAAHPC), IEEE Computer Society, 2011, pp. 60–63.
LibreCat
| DOI
B. Meyer, C. Plessl, J. Förstner, in: Symp. on Application Accelerators in High Performance Computing (SAAHPC), IEEE Computer Society, 2011, pp. 60–63.
2011 | Conference Paper | LibreCat-ID: 2193
Cooperative multitasking for heterogeneous accelerators in the Linux Completely Fair Scheduler
T. Beisel, T. Wiersema, C. Plessl, A. Brinkmann, in: Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP), IEEE Computer Society, 2011, pp. 223–226.
LibreCat
| DOI
T. Beisel, T. Wiersema, C. Plessl, A. Brinkmann, in: Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP), IEEE Computer Society, 2011, pp. 223–226.
2011 | Conference Paper | LibreCat-ID: 656
Measuring and Predicting Temperature Distributions on FPGAs at Run-Time
M. Happe, A. Agne, C. Plessl, in: Proceedings of the 2011 International Conference on Reconfigurable Computing and FPGAs (ReConFig), IEEE, 2011, pp. 55–60.
LibreCat
| Files available
| DOI
M. Happe, A. Agne, C. Plessl, in: Proceedings of the 2011 International Conference on Reconfigurable Computing and FPGAs (ReConFig), IEEE, 2011, pp. 55–60.
2011 | Conference Paper | LibreCat-ID: 2200
Performance Estimation Framework for Automated Exploration of CPU-Accelerator Architectures
T. Kenter, M. Platzner, C. Plessl, M. Kauschke, in: Proc. Int. Symp. on Field-Programmable Gate Arrays (FPGA), ACM, New York, NY, USA, 2011, pp. 177–180.
LibreCat
| DOI
T. Kenter, M. Platzner, C. Plessl, M. Kauschke, in: Proc. Int. Symp. on Field-Programmable Gate Arrays (FPGA), ACM, New York, NY, USA, 2011, pp. 177–180.
2011 | Journal Article | LibreCat-ID: 2201
FPGA Acceleration of Communication-bound Streaming Applications: Architecture Modeling and a 3D Image Compositing Case Study
T. Schumacher, T. Süß, C. Plessl, M. Platzner, Int. Journal of Recon- Figurable Computing (IJRC) (2011).
LibreCat
| DOI
T. Schumacher, T. Süß, C. Plessl, M. Platzner, Int. Journal of Recon- Figurable Computing (IJRC) (2011).
2011 | Conference Paper | LibreCat-ID: 2198
Just-in-time Instruction Set Extension – Feasibility and Limitations for an FPGA-based Reconfigurable ASIP Architecture
M. Grad, C. Plessl, in: Proc. Reconfigurable Architectures Workshop (RAW), IEEE Computer Society, 2011, pp. 278–285.
LibreCat
| DOI
M. Grad, C. Plessl, in: Proc. Reconfigurable Architectures Workshop (RAW), IEEE Computer Society, 2011, pp. 278–285.