Energy Efficient Parallel K-Means Clustering for an Intel® Hybrid Multi-Chip Package

M.A. Souza, L.A. Maciel, P.H. Penna, H.C. Freitas, in: 2018 30th International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD), 2019.

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Conference Paper | Published | English
Author
Souza, Matheus A.; Maciel, Lucas A.; Penna, Pedro Henrique; Freitas, Henrique C.
Abstract
FPGA devices have been proving to be good candidates to accelerate applications from different research topics. For instance, machine learning applications such as K-Means clustering usually relies on large amount of data to be processed, and, despite the performance offered by other architectures, FPGAs can offer better energy efficiency. With that in mind, Intel has launched a platform that integrates a multicore and an FPGA in the same package, enabling low latency and coherent fine-grained data offload. In this paper, we present a parallel implementation of the K-Means clustering algorithm, for this novel platform, using OpenCL language, and compared it against other platforms. We found that the CPU+FPGA platform was more energy efficient than the CPU-only approach from 70.71% to 85.92%, with Standard and Tiny input sizes respectively, and up to 68.21% of performance improvement was obtained with Tiny input size. Furthermore, it was up to 7.2×more energy efficient than an Intel® Xeon Phi ™, 21.5×than a cluster of Raspberry Pi boards, and 3.8×than the low-power MPPA-256 architecture, when the Standard input size was used.
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Proceedings Title
2018 30th International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD)
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Souza MA, Maciel LA, Penna PH, Freitas HC. Energy Efficient Parallel K-Means Clustering for an Intel® Hybrid Multi-Chip Package. In: 2018 30th International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD). ; 2019. doi:10.1109/cahpc.2018.8645850
Souza, M. A., Maciel, L. A., Penna, P. H., & Freitas, H. C. (2019). Energy Efficient Parallel K-Means Clustering for an Intel® Hybrid Multi-Chip Package. In 2018 30th International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD). https://doi.org/10.1109/cahpc.2018.8645850
@inproceedings{Souza_Maciel_Penna_Freitas_2019, title={Energy Efficient Parallel K-Means Clustering for an Intel® Hybrid Multi-Chip Package}, DOI={10.1109/cahpc.2018.8645850}, booktitle={2018 30th International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD)}, author={Souza, Matheus A. and Maciel, Lucas A. and Penna, Pedro Henrique and Freitas, Henrique C.}, year={2019} }
Souza, Matheus A., Lucas A. Maciel, Pedro Henrique Penna, and Henrique C. Freitas. “Energy Efficient Parallel K-Means Clustering for an Intel® Hybrid Multi-Chip Package.” In 2018 30th International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD), 2019. https://doi.org/10.1109/cahpc.2018.8645850.
M. A. Souza, L. A. Maciel, P. H. Penna, and H. C. Freitas, “Energy Efficient Parallel K-Means Clustering for an Intel® Hybrid Multi-Chip Package,” in 2018 30th International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD), 2019.
Souza, Matheus A., et al. “Energy Efficient Parallel K-Means Clustering for an Intel® Hybrid Multi-Chip Package.” 2018 30th International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD), 2019, doi:10.1109/cahpc.2018.8645850.

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