Timing Optimization for Virtual FPGA Configurations
L.M. Witschen, T. Wiersema, M. Raeisi Nafchi, A. Bockhorn, M. Platzner, in: F. Hannig, S. Derrien, P. Diniz, D. Chillet (Eds.), Proceedings of International Symposium on Applied Reconfigurable Computing (ARC’21), Springer Lecture Notes in Computer Science, n.d.
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Conference Paper
| Accepted
| English
Author
Witschen, Linus MatthiasLibreCat;
Wiersema, TobiasLibreCat;
Raeisi Nafchi, Masood;
Bockhorn, Arne;
Platzner, MarcoLibreCat
Editor
Hannig, Frank;
Derrien, Steven;
Diniz, Pedro;
Chillet, Daniel
Department
Project
Publishing Year
Proceedings Title
Proceedings of International Symposium on Applied Reconfigurable Computing (ARC'21)
forms.conference.field.series_title_volume.label
Reconfigurable Computing: Architectures, Tools, and Applications
Conference
International Symposium on Applied Reconfigurable Computing
Conference Location
Virtual conference
Conference Date
2021-06-29 – 2021-07-01
LibreCat-ID
Cite this
Witschen LM, Wiersema T, Raeisi Nafchi M, Bockhorn A, Platzner M. Timing Optimization for Virtual FPGA Configurations. In: Hannig F, Derrien S, Diniz P, Chillet D, eds. Proceedings of International Symposium on Applied Reconfigurable Computing (ARC’21). Reconfigurable Computing: Architectures, Tools, and Applications. Springer Lecture Notes in Computer Science. doi:10.1007/978-3-030-79025-7_4
Witschen, L. M., Wiersema, T., Raeisi Nafchi, M., Bockhorn, A., & Platzner, M. (n.d.). Timing Optimization for Virtual FPGA Configurations. In F. Hannig, S. Derrien, P. Diniz, & D. Chillet (Eds.), Proceedings of International Symposium on Applied Reconfigurable Computing (ARC’21). Springer Lecture Notes in Computer Science. https://doi.org/10.1007/978-3-030-79025-7_4
@inproceedings{Witschen_Wiersema_Raeisi Nafchi_Bockhorn_Platzner, series={Reconfigurable Computing: Architectures, Tools, and Applications}, title={Timing Optimization for Virtual FPGA Configurations}, DOI={10.1007/978-3-030-79025-7_4}, booktitle={Proceedings of International Symposium on Applied Reconfigurable Computing (ARC’21)}, publisher={Springer Lecture Notes in Computer Science}, author={Witschen, Linus Matthias and Wiersema, Tobias and Raeisi Nafchi, Masood and Bockhorn, Arne and Platzner, Marco}, editor={Hannig, Frank and Derrien, Steven and Diniz, Pedro and Chillet, Daniel}, collection={Reconfigurable Computing: Architectures, Tools, and Applications} }
Witschen, Linus Matthias, Tobias Wiersema, Masood Raeisi Nafchi, Arne Bockhorn, and Marco Platzner. “Timing Optimization for Virtual FPGA Configurations.” In Proceedings of International Symposium on Applied Reconfigurable Computing (ARC’21), edited by Frank Hannig, Steven Derrien, Pedro Diniz, and Daniel Chillet. Reconfigurable Computing: Architectures, Tools, and Applications. Springer Lecture Notes in Computer Science, n.d. https://doi.org/10.1007/978-3-030-79025-7_4.
L. M. Witschen, T. Wiersema, M. Raeisi Nafchi, A. Bockhorn, and M. Platzner, “Timing Optimization for Virtual FPGA Configurations,” in Proceedings of International Symposium on Applied Reconfigurable Computing (ARC’21), Virtual conference, doi: 10.1007/978-3-030-79025-7_4.
Witschen, Linus Matthias, et al. “Timing Optimization for Virtual FPGA Configurations.” Proceedings of International Symposium on Applied Reconfigurable Computing (ARC’21), edited by Frank Hannig et al., Springer Lecture Notes in Computer Science, doi:10.1007/978-3-030-79025-7_4.
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