In-depth FPGA Accelerator Performance Evaluation with Single Node Benchmarks from the HPC Challenge Benchmark Suite for Intel and Xilinx FPGAs using OpenCL
M. Meyer, T. Kenter, C. Plessl, Journal of Parallel and Distributed Computing (2022).
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Meyer M, Kenter T, Plessl C. In-depth FPGA Accelerator Performance Evaluation with Single Node Benchmarks from the HPC Challenge Benchmark Suite for Intel and Xilinx FPGAs using OpenCL. Journal of Parallel and Distributed Computing. Published online 2022. doi:10.1016/j.jpdc.2021.10.007
Meyer, M., Kenter, T., & Plessl, C. (2022). In-depth FPGA Accelerator Performance Evaluation with Single Node Benchmarks from the HPC Challenge Benchmark Suite for Intel and Xilinx FPGAs using OpenCL. Journal of Parallel and Distributed Computing. https://doi.org/10.1016/j.jpdc.2021.10.007
@article{Meyer_Kenter_Plessl_2022, title={In-depth FPGA Accelerator Performance Evaluation with Single Node Benchmarks from the HPC Challenge Benchmark Suite for Intel and Xilinx FPGAs using OpenCL}, DOI={10.1016/j.jpdc.2021.10.007}, journal={Journal of Parallel and Distributed Computing}, author={Meyer, Marius and Kenter, Tobias and Plessl, Christian}, year={2022} }
Meyer, Marius, Tobias Kenter, and Christian Plessl. “In-Depth FPGA Accelerator Performance Evaluation with Single Node Benchmarks from the HPC Challenge Benchmark Suite for Intel and Xilinx FPGAs Using OpenCL.” Journal of Parallel and Distributed Computing, 2022. https://doi.org/10.1016/j.jpdc.2021.10.007.
M. Meyer, T. Kenter, and C. Plessl, “In-depth FPGA Accelerator Performance Evaluation with Single Node Benchmarks from the HPC Challenge Benchmark Suite for Intel and Xilinx FPGAs using OpenCL,” Journal of Parallel and Distributed Computing, 2022, doi: 10.1016/j.jpdc.2021.10.007.
Meyer, Marius, et al. “In-Depth FPGA Accelerator Performance Evaluation with Single Node Benchmarks from the HPC Challenge Benchmark Suite for Intel and Xilinx FPGAs Using OpenCL.” Journal of Parallel and Distributed Computing, 2022, doi:10.1016/j.jpdc.2021.10.007.
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