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60 Publications
2023 | Mastersthesis | LibreCat-ID: 46075
Raeisi Nafchi, M. (2023). Reconfigurable Random Forest Implementation on FPGA.
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2023 | Mastersthesis | LibreCat-ID: 45917
Raeisi Nafchi, M. (2023). Reconfigurable Random Forest Implementation on FPGA. Paderborn University.
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2023 | Mastersthesis | LibreCat-ID: 45916
Yadalam Murali Kumar, N. (2023). Data Analytics for Predictive Maintenance of Time Series Data. Paderborn University.
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2022 | Mastersthesis | LibreCat-ID: 45915
Kaur , P. (2022). Analysis of Time-Series Classification in Conditional Monitoring Systems.
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2022 | Mastersthesis | LibreCat-ID: 45914
Manjunatha, S. (2022). Dealing With Pre-Processing And Feature Extraction Of Time-Series Data In Predictive Maintenance. Paderborn University .
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2022 | Mastersthesis | LibreCat-ID: 45715
Tcheussi Ngayap, V. I. (2022). FreeRTOS on a MicroBlaze Soft-Core Processor with Hardware Accelerators.
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2021 | Mastersthesis | LibreCat-ID: 29540
Sheikh, M. A. (2021). Design and Implementation of a ReconROS-based Obstacle Avoidance System. Paderborn University.
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2021 | Mastersthesis | LibreCat-ID: 29151
Kashikar, C. (2021). A Comparison of Machine Learning Techniques for the On-line Characterization of Tasks Executed on Heterogeneous Compute Nodes. Paderborn University.
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2020 | Mastersthesis | LibreCat-ID: 21433
Jentzsch, F. P. (2020). Design and Implementation of a ReconOS-based TensorFlow Lite Delegate Architecture.
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2020 | Mastersthesis | LibreCat-ID: 21324
Chandrakar, K. (2020). Comparison of Feature Selection Techniques to Improve Approximate Circuit Synthesis.
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2020 | Mastersthesis | LibreCat-ID: 20821
Jaganath, V. (2020). Extension and Evaluation of Python-based High-Level Synthesis Tool Flows.
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2019 | Mastersthesis | LibreCat-ID: 52478
Mehta, J. D. (2019). Multithreaded Software/Hardware Programming with ReconOS/freeRTOS on a Reconfigurable System-on-Chip.
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2019 | Mastersthesis | LibreCat-ID: 15874 | 
Lienen, C. (n.d.). Implementing a Real-time System on a Platform FPGA operated with ReconOS. Universität Paderborn.
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2019 | Mastersthesis | LibreCat-ID: 15920
Keerthipati, M. (2019). A Bitstream-Level Proof-Carrying Hardware Technique for Information Flow Tracking. Universität Paderborn.
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2019 | Mastersthesis | LibreCat-ID: 15946
Mehta, J. (2019). Multithreaded Software/Hardware Programming with ReconOS/freeRTOS on a Recongurable System-on-Chip.
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2019 | Mastersthesis | LibreCat-ID: 15883
Kumar Jeyakumar, S. (2019). Incremental learning with Support Vector Machine on embedded platforms.
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2019 | Mastersthesis | LibreCat-ID: 14831
Sabu, N. S. (2019). FPGA Acceleration of String Search Techniques in Huge Data Sets. Paderborn University.
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2019 | Mastersthesis | LibreCat-ID: 14546
Hansmeier, T. (2019). Autonomous Operation of High-Performance Compute Nodes through Self-Awareness and Learning Classifiers. Universität Paderborn.
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2018 | Mastersthesis | LibreCat-ID: 10782
Clausing, L. (2018). Development of a Hardware / Software Codesign for sonification of LIDAR-based sensor data. Ruhr-University Bochum.
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2017 | Mastersthesis | LibreCat-ID: 74
Knorr, C. (2017). OpenCL-basierte Videoverarbeitung auf heterogenen Rechenknoten. Universität Paderborn.
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2017 | Mastersthesis | LibreCat-ID: 1157
Witschen, L. M. (2017). A Framework for the Synthesis of Approximate Circuits. Universität Paderborn.
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2017 | Mastersthesis | LibreCat-ID: 10708
Dietrich, A. (2017). Reconfigurable Cryptographic Services. Paderborn University.
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2017 | Mastersthesis | LibreCat-ID: 10666
Riaz, U. (2017). Acceleration of Industrial Analytics Functions on a Platform FPGA. Paderborn University.
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2016 | Mastersthesis | LibreCat-ID: 10706
Makeswaran, V. (2016). Operating System Support for Reconfigurable Cache. Paderborn University.
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2016 | Mastersthesis | LibreCat-ID: 10707
Ibne Ashraf, I. (2016). Private/Shared Data Classification and Implementation for a Multi-Softcore Platform. Paderborn University.
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2016 | Mastersthesis | LibreCat-ID: 10612
Cedric Mertens, J. (2016). Sprint Diagnostic with RTK-GPS \& IMU Sensor Fusion. Paderborn University.
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2016 | Mastersthesis | LibreCat-ID: 10616
Nassery, A. S. (2016). Implementation of Bilinear Pairings on Reconfigurable Hardware. Paderborn University.
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2016 | Mastersthesis | LibreCat-ID: 10617
Amin, O. (2016). Acceleration of EMTP for Distribution Networks on Data Flow Machines using the Latency Insertion Method. Paderborn University.
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2015 | Mastersthesis | LibreCat-ID: 10726
Posewsky, T. (2015). Acceleration of Artificial Neural Networks on a Zynq Platform. Paderborn University.
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2015 | Mastersthesis | LibreCat-ID: 10668
Hangmann, H. (2015). Evolution of Heat Flow Prediction Models for FPGA Devices. Paderborn University.
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2015 | Mastersthesis | LibreCat-ID: 10671
Haupt, C. (2015). Computer Vision basierte Klassifikation von HD EMG Signalen. Paderborn University.
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2015 | Mastersthesis | LibreCat-ID: 10615
Ahmed, A. F. (2015). Self-Optimizing Organic Cache. Paderborn University.
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2014 | Mastersthesis | LibreCat-ID: 10701
Koch, B. (2014). Hardware Acceleration of Mechatronic Controllers on a Zynq Platform FPGA. Paderborn University.
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2014 | Mastersthesis | LibreCat-ID: 10715
Mittendorf, R. (2014). Advanced AES-key recovery from decayed RAM using multi-threading and FPGAs. Paderborn University.
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2014 | Mastersthesis | LibreCat-ID: 10744
Surmund, S. (2014). Multithreaded Parallelization of Mechatronic Controllers on a Zynq Platform FPGA. Paderborn University.
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2014 | Mastersthesis | LibreCat-ID: 10640
Brand, M. (2014). A Generalized Loop Accelerator Implemented as a Coarse-Grained Array. Paderborn University.
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2014 | Mastersthesis | LibreCat-ID: 10645
Damschen, M. (2014). Easy-to-use-on-the-fly binary program acceleration on many-cores. Paderborn University.
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2013 | Mastersthesis | LibreCat-ID: 10730
Riebler, H. (2013). Identifikation und Wiederherstellung von kryptographischen Schlüsseln mit FPGAs. Paderborn University.
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2012 | Mastersthesis | LibreCat-ID: 10754
Wistuba, M. (2012). Analysis of Pattern Based Model Design and Learning in Computer-Go. Paderborn University.
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2012 | Mastersthesis | LibreCat-ID: 10650
Dridger, D. (2012). Design and Implementation of a Nanophotonics Simulation Personality for the Convey HC-1 Hybrid Core Computer. Paderborn University.
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2012 | Mastersthesis | LibreCat-ID: 10658
Graf, T. (2012). Adaptive Playouts in der Monte-Carlo Spielbaumsuche am Anwendungsfall Go. Paderborn University.
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2011 | Mastersthesis | LibreCat-ID: 10736
Schwabe, A. (2011). Analysis of Algorithmic Approaches for Temporal Partitioning. Paderborn University.
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2011 | Mastersthesis | LibreCat-ID: 10750
Welp, D. (2011). User Space Scheduling for Heterogeneous Systems. Paderborn University.
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2010 | Mastersthesis | LibreCat-ID: 10710
Meiche, R. (2010). FPGA/CPU Multicore-Plattform für ReconOS/eCos. Paderborn University.
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2010 | Mastersthesis | LibreCat-ID: 10717
Niekamp, M. (2010). Transparente Hardwarebeschleunigung durch Shared Library Interposing. Paderborn University.
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2010 | Mastersthesis | LibreCat-ID: 10731
Runde, B. (2010). A Token-Ring Network-On-Chip for Message Passing in ReconOS. Paderborn University.
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2010 | Mastersthesis | LibreCat-ID: 10752
Wiersema, T. (2010). Scheduling Support for Heterogeneous Hardware Accelerators under Linux. Paderborn University.
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2010 | Mastersthesis | LibreCat-ID: 10642
Breitlauch, D. (2010). Evolvable Cache Controller. Paderborn University.
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2010 | Mastersthesis | LibreCat-ID: 10697
Knieper, T. (2010). Hybridization of Global Multi-Objective and Local Search Techniques. Paderborn University.
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2010 | Mastersthesis | LibreCat-ID: 10629
Boschmann, A. (2010). EMG-basierte Ganganalyse. Paderborn University.
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2010 | Mastersthesis | LibreCat-ID: 10614
Agne, A. (2010). Virtuelle Speicherverwaltung für Hardware Threads in Rekonfigurierbaren Systemen. Paderborn University.
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2009 | Mastersthesis | LibreCat-ID: 10702
Kostin, A. (2009). Evolvable Robot Controller. Paderborn University.
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2009 | Mastersthesis | LibreCat-ID: 10746
Tofall, M. (2009). Compiler for a Custom Instruction Set CPU. Paderborn University.
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2009 | Mastersthesis | LibreCat-ID: 10749
Warkentin, A. (2009). Coarse-grained CGP Model using Xilinx Virtex5 DSP48E Functional Units. Paderborn University.
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2008 | Mastersthesis | LibreCat-ID: 10669
Happe, M. (2008). Parallelisierung und Hardware- / Software - Codesign von Partikelfiltern. Paderborn University.
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2007 | Mastersthesis | LibreCat-ID: 10728
Reisch, W. (2007). Bildverarbeitungs-Architekturen und -Bibliotheken für das rekonfigurierbare Betriebssystem ReconOS. Paderborn University.
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2007 | Mastersthesis | LibreCat-ID: 10729
Rethmeier, E. (2007). Konzeption und Implementierung einer Microsoft Windows CE 5.0 Plattform für ein ARM-basiertes eingebettetes Rechnersystem. Paderborn University.
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2007 | Mastersthesis | LibreCat-ID: 10647
Defo, B. (2007). A Comparison of Multi-Objective Evolutionary Algorithms for Automated Circuit Design and Optimization. Paderborn University.
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2007 | Mastersthesis | LibreCat-ID: 10648
Döhre, S. (2007). Entwurf und Implementierung einer RocketIO-basierten Kommunikationsschnittstelle für Multi-FPGA Systeme. Paderborn University.
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2007 | Mastersthesis | LibreCat-ID: 10623
Beisel, T. (2007). Entwurf und Evaluation eines parallelen Verfahrens zur Bildrekonstruktion in der Positronen-Emissions-Tomographie auf Multi-Core-Architekturen. Paderborn University.
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