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264 Publications
2014 | Conference Paper | LibreCat-ID: 24305
Mischkalla F, Müller W. Architectural Low-Power Design Using Transaction-Based System Modeling and Simulation. In: Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XIV). IEEE; 2014. doi:10.1109/SAMOS.2014.6893219
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2014 | Journal Article | LibreCat-ID: 24302
Koppelmann B, Messidat B, Becker M, Kuznik C, Müller W, Scheytt C. Fast and Open Virtual Platforms for TriCore-based SoCs Using QEMU. Design and Verification Conference (DVCON EUROPE). Published online 2014.
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2014 | Journal Article | LibreCat-ID: 24309
Kuznik C, Müller W. Verific-MM: Systematized Verification Metrics Generation with UCIS for Improved Automation on Verification Closure. Design, Automation and Test in Europe DATE, University Booth, Dresden. Published online 2014.
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2014 | Conference Paper | LibreCat-ID: 24311
Oetjens J-H, Becker M, Kuznik C, et al. Safety Evaluation of Automotive Electronics Using Virtual Prototypes: State of the Art and Research Challenges. In: Design Automation Conference (DAC). ; 2014. doi:10.1145/2593069.2602976
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2014 | Conference Paper | LibreCat-ID: 25120
Mischkalla F, Müller W. Architectural Low-Power Design Using Transaction-Based System Simulation. In: Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XIV). IEEE; 2014.
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2014 | Conference Paper | LibreCat-ID: 25146
Joy M tech. MM, Müller W, Rammig F-J. Source code annotated memory leak detection for soft real time embedded systems with resource constraints. In: 12th IEEE International Conference on Embedded Computing. ; 2014.
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2014 | Conference Paper | LibreCat-ID: 25144
Mischkalla F, Müller W. Advanced SoC Virtual Prototyping for System-Level Power Planning and Validation. In: PATMOS 2014. ; 2014.
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2014 | Conference Paper | LibreCat-ID: 36918
Becker M, Kuznik C, Müller W. Fault Effect Modeling in a Heterogeneous SystemC Based Virtual Platform Framework for Cyber Physical Systems. In: IEEE; 2014. doi:10.1109/ICCPS.2014.6843726
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| DOI
2014 | Conference Paper | LibreCat-ID: 36917
Kuznik C, Müller W, Defo GB. An Assisted Single Source Verification Metric Model Code Generation Methodology. In: ; 2014.
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2014 | Conference Paper | LibreCat-ID: 25166
Kuznik C, Müller W. Modellierung effizienter Stresstest-Umgebungen für virtuelle Prototypen mit SVM. In: 26. ITG / GI / GMM Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen. ; 2014.
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2014 | Conference Paper | LibreCat-ID: 25163
Kuznik C, Defo BG, Müller W. Semi-automatische Generierung von Überdeckungsmetriken mittels methodischer Verikationsplan Verarbeitung. In: 17. Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV 2014) . ; 2014.
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2014 | Journal Article | LibreCat-ID: 25151
Kuznik C, Defo BG, Müller W. An Assisted Single Source Verification Metric Model Code Generation Methodology. Electronic System Level Synthesis Conference (ESLSyn). Published online 2014.
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2014 | Conference Paper | LibreCat-ID: 34585
Koppelmann B, Messidat B, Becker M, Müller W, Scheytt JC. Fast and Open Virtual Platforms for TriCore-based SoCs Using QEMU. In: Proceedings of the Design and Verification Conference Europe (DVCON Europe). ; 2014.
LibreCat
2014 | Journal Article | LibreCat-ID: 25164
Becker M, Müller W, Stroop J, Kiffmeier U. HeroeS - A Framework for Heterogeneous Software-Intensive System Design with SystemC. Design, Automation and Test in Europe DATE, University Booth, Dresden. Published online 2014.
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2013 | Conference Paper | LibreCat-ID: 25270
Joy M tech. MM, Müller W, Rammig F-J. Early Phase Memory Leak Detection in Embedded Software Designs with Virtual Memory Management Model. In: Proceedings of AVICPS 2013, Dez. 2013 IEEE Computer Society,. Linköping University Electronic Press; 2013.
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2013 | Conference Paper | LibreCat-ID: 25271
He D, Müller W. AN ENERGY-EFFICIENT HEURISTIC FOR HARD REAL- TIME SYSTEM ON MULTI-CORE PROCESSORS. In: Proceedings of International Conference on Applied Computing (AC). ; 2013.
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2013 | Conference Paper | LibreCat-ID: 25284
Mischkalla F, Müller W. Efficient Power Intent Validation Using Loosely-Timed Simulation Models. In: 23rd International Workshop on Power And Timing Modeling, Optimization and Simulation, Sep. 2013. ; 2013.
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2013 | Conference Paper | LibreCat-ID: 25291
Becker M, Kiffmeier U, Müller W. HeroeS: Virtual Platform Driven Integration of Heterogeneous Software Components for Multi-Core Real-Time Architectures. In: 16th IEEE Computer Society Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing. ; 2013.
LibreCat
2013 | Conference Paper | LibreCat-ID: 25606
Kuznik C, F. S. Oliveira M, Müller W. SystemC Verification Components - An enhanced OVM/UVM for SystemC. In: EdaWorkshop 13. ; 2013.
LibreCat
2013 | Conference Paper | LibreCat-ID: 25612
Mischkalla F, Müller W. Funktionale Verifikation von Low-Power Designs unter Verwendung Virtueller Prototypen. In: Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV). ; 2013.
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