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284 Publications
2016 | Conference Paper | LibreCat-ID: 24264
Adelt P, Koppelmann B, Müller W, Becker M, Kleinjohann B, Scheytt C. Fast Dynamic Fault Injection for Virtual Microcontroller Platforms. In: Proceedings of the IEEE/IFIP International Conference on VLSI (VLSI-SOC). ; 2016. doi:10.1109/VLSI-SoC.2016.7753545
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2016 | Conference Paper | LibreCat-ID: 24263
Abughannam S, Wu L, Müller W, Scheytt C, Ecker W, Novello C. Fault Injection and Mixed-Level Simulation for Analog Circuits - A Case Study. In: Analog 2016 - VDE. ; 2016.
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2015 | Conference Paper | LibreCat-ID: 24289
Müller W, Wu L, Scheytt C, Becker M, Schoenberg S. On the Correlation of HW Faults and SW Errors. In: Mueller-Gritschneder D, Müller W, Mitra S, eds. Proceedings of the 1st International Workshop on Resiliency in Embedded Electronic Systems (REES 2014). ; 2015.
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2015 | Book (Editor) | LibreCat-ID: 53590
Müller-Gridschneder D, Müller W, Mitra S, eds. Proceedings of the 1st International Workshop on Resiliency in Embedded Electronic Systems.; 2015.
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2014 | Conference Paper | LibreCat-ID: 25145
Becker M, Kuznik C, Müller W. Virtual Platforms for Model-Based Design of Dependable Cyber-Physical System Software. In: 17th Euromicro Conference on Digital Systems Design (DSD). ; 2014.
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2014 | Conference Paper | LibreCat-ID: 25155
Becker M, Kuznik C, Müller W. Fault Effect Modeling in a Heterogeneous SystemC Virtual Platform Framework for Cyber-Physical Systems. In: ACM/IEEE 5th International Conference on Cyber-Physical Systems. ; 2014.
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2014 | Conference Paper | LibreCat-ID: 25161
Koppelmann B, Becker M, Müller W. Portierung der TriCore-Architektur auf QEMU. In: 17. Workshop Methoden Und Beschreibungssprachen Zur Modellierung Und Verifikation von Schaltungen Und Systemen (MBMV 2014) . ; 2014.
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2014 | Conference Paper | LibreCat-ID: 24305
Mischkalla F, Müller W. Architectural Low-Power Design Using Transaction-Based System Modeling and Simulation. In: Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XIV). IEEE; 2014. doi:10.1109/SAMOS.2014.6893219
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2014 | Journal Article | LibreCat-ID: 24302
Koppelmann B, Messidat B, Becker M, Kuznik C, Müller W, Scheytt C. Fast and Open Virtual Platforms for TriCore-based SoCs Using QEMU. Design and Verification Conference (DVCON EUROPE). Published online 2014.
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2014 | Journal Article | LibreCat-ID: 24309
Kuznik C, Müller W. Verific-MM: Systematized Verification Metrics Generation with UCIS for Improved Automation on Verification Closure. Design, Automation and Test in Europe DATE, University Booth, Dresden. Published online 2014.
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2014 | Conference Paper | LibreCat-ID: 24311
Oetjens J-H, Becker M, Kuznik C, et al. Safety Evaluation of Automotive Electronics Using Virtual Prototypes: State of the Art and Research Challenges. In: Design Automation Conference (DAC). ; 2014. doi:10.1145/2593069.2602976
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2014 | Journal Article | LibreCat-ID: 25164
Becker M, Müller W, Stroop J, Kiffmeier U. HeroeS - A Framework for Heterogeneous Software-Intensive System Design with SystemC. Design, Automation and Test in Europe DATE, University Booth, Dresden. Published online 2014.
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2014 | Conference Paper | LibreCat-ID: 25120
Mischkalla F, Müller W. Architectural Low-Power Design Using Transaction-Based System Simulation. In: Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XIV). IEEE; 2014.
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2014 | Conference Paper | LibreCat-ID: 25146
Joy M tech. MM, Müller W, Rammig F-J. Source code annotated memory leak detection for soft real time embedded systems with resource constraints. In: 12th IEEE International Conference on Embedded Computing. ; 2014.
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2014 | Conference Paper | LibreCat-ID: 25144
Mischkalla F, Müller W. Advanced SoC Virtual Prototyping for System-Level Power Planning and Validation. In: PATMOS 2014. ; 2014.
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2014 | Conference Paper | LibreCat-ID: 36918
Becker M, Kuznik C, Müller W. Fault Effect Modeling in a Heterogeneous SystemC Based Virtual Platform Framework for Cyber Physical Systems. In: IEEE; 2014. doi:10.1109/ICCPS.2014.6843726
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2014 | Conference Paper | LibreCat-ID: 36917
Kuznik C, Müller W, Defo GB. An Assisted Single Source Verification Metric Model Code Generation Methodology. In: ; 2014.
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2014 | Conference Paper | LibreCat-ID: 25166
Kuznik C, Müller W. Modellierung effizienter Stresstest-Umgebungen für virtuelle Prototypen mit SVM. In: 26. ITG / GI / GMM Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen. ; 2014.
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2014 | Conference Paper | LibreCat-ID: 25163
Kuznik C, Defo BG, Müller W. Semi-automatische Generierung von Überdeckungsmetriken mittels methodischer Verikationsplan Verarbeitung. In: 17. Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV 2014) . ; 2014.
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2014 | Journal Article | LibreCat-ID: 25151
Kuznik C, Defo BG, Müller W. An Assisted Single Source Verification Metric Model Code Generation Methodology. Electronic System Level Synthesis Conference (ESLSyn). Published online 2014.
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