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92 Publications
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2016 | Conference Paper | LibreCat-ID: 168
Lösch, A., Beisel, T., Kenter, T., Plessl, C., & Platzner, M. (2016). Performance-centric scheduling with task migration for a heterogeneous compute node in the data center. Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition (DATE), 912–917.
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2016 | Conference Paper | LibreCat-ID: 171
Kenter, T., Vaz, G. F., Riebler, H., & Plessl, C. (2016). Opportunities for deferring application partitioning and accelerator synthesis to runtime (extended abstract). Workshop on Reconfigurable Computing (WRC).
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2015 | Bachelorsthesis | LibreCat-ID: 3364
Knorr, C. (2015). Evaluation von Bildverarbeitungsalgorithmen in heterogenen Rechenknoten. Universität Paderborn.
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2015 | Journal Article | LibreCat-ID: 1772
Torresen, J., Plessl, C., & Yao, X. (2015). Self-Aware and Self-Expressive Systems – Guest Editor’s Introduction. IEEE Computer, 48(7), 18–20. https://doi.org/10.1109/MC.2015.205
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2015 | Mastersthesis | LibreCat-ID: 5413
Funke, L. (2015). An LLVM Based Toolchain for Transparent Acceleration of Digital Image Processing Applications using FPGA Overlay Architectures. Universität Paderborn.
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2015 | Mastersthesis | LibreCat-ID: 5416
Löcke, T. (2015). Instance-Specific Computing in Hard- and Software for Faster Solving of Complex Problems. Universität Paderborn.
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2015 | Mastersthesis | LibreCat-ID: 5419
Wallaschek, F. (2015). Accelerating Programmable Logic Controllers with the use of FPGAs. Universität Paderborn.
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2015 | Journal Article | LibreCat-ID: 296
Kenter, T., Schmitz, H., & Plessl, C. (2015). Exploring Tradeoffs between Specialized Kernels and a Reusable Overlay in a Stereo-Matching Case Study. International Journal of Reconfigurable Computing (IJRC), 2015, Article 859425. https://doi.org/10.1155/2015/859425
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2015 | Conference Paper | LibreCat-ID: 303 | 
Damschen, M., & Plessl, C. (2015). Easy-to-Use On-The-Fly Binary Program Acceleration on Many-Cores. Proceedings of the 5th International Workshop on Adaptive Self-Tuning Computing Systems (ADAPT).
LibreCat
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| arXiv
2015 | Conference Paper | LibreCat-ID: 238
Damschen, M., Riebler, H., Vaz, G. F., & Plessl, C. (2015). Transparent offloading of computational hotspots from binary code to Xeon Phi. Proceedings of the 2015 Conference on Design, Automation and Test in Europe (DATE), 1078–1083. https://doi.org/10.7873/DATE.2015.1124
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2014 | Bachelorsthesis | LibreCat-ID: 334
Wagener, P. (2014). Vertical Thread Migration in FPGA based Sound Localization. Universität Paderborn.
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2014 | Conference Paper | LibreCat-ID: 347
Meisner, S., & Platzner, M. (2014). Thread Shadowing: Using Dynamic Redundancy on Hybrid Multi-cores for Error Detection. In D. Goehringer, M. Santambrogio, J. P. Cardoso, & K. Bertels (Eds.), Proceedings of the 10th International Symposium on Applied Reconfigurable Computing (ARC) (pp. 283–290). Springer. https://doi.org/10.1007/978-3-319-05960-0_30
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2014 | Bachelorsthesis | LibreCat-ID: 348
Rüthing, C. (2014). The Xilinx Zynq Architecture as a Platform for Reconfigurable Heterogeneous Multi-Cores. Universität Paderborn.
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2014 | Conference Paper | LibreCat-ID: 368
Brinkmann, A., Kling, P., Meyer auf der Heide, F., Nagel, L., Riechers, S., & Suess, T. (2014). Scheduling Shared Continuous Resources on Many-Cores. Proceedings of the 26th ACM Symposium on Parallelism in Algorithms and Architectures (SPAA), 128–137. https://doi.org/10.1145/2612669.2612698
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2014 | Conference Paper | LibreCat-ID: 374
Wold, A., Agne, A., & Torresen, J. (2014). Relocatable Hardware Threads in Run-Time Reconfigurable Systems. In D. Goehringer, M. Santambrogio, J. P. Cardoso, & K. Bertels (Eds.), Proceedings of the 10th International Symposium on Reconfigurable Computing: Architectures, Tools, and Applications (pp. 61–72). https://doi.org/10.1007/978-3-319-05960-0_6
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2014 | Conference Paper | LibreCat-ID: 451
Drees, M., Riechers, S., & Skopalik, A. (2014). Budget-restricted utility games with ordered strategic decisions. In R. Lavi (Ed.), Proceedings of the 7th International Symposium on Algorithmic Game Theory (SAGT) (pp. 110–121). https://doi.org/10.1007/978-3-662-44803-8_10
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2014 | Mastersthesis | LibreCat-ID: 460
Mittendorf, R. (2014). Advanced AES-key recovery from decayed RAM-dumps using multi-threading and FPGAs. Universität Paderborn.
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2014 | Mastersthesis | LibreCat-ID: 466
Brand, M. (2014). A generalized loop accelerator implemented as a coarse grained array. Universität Paderborn.
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2014 | Dissertation | LibreCat-ID: 431
Kling, P. (2014). Energy-efficient Scheduling Algorithms. Universität Paderborn.
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2014 | Conference Paper | LibreCat-ID: 435
Antoniadis, A., Barcelo, N., Consuegra, M., Kling, P., Nugent, M., Pruhs, K., & Scquizzato, M. (2014). Efficient Computation of Optimal Energy and Fractional Weighted Flow Trade-off Schedules. In Proceedings of the 31st Symposium on Theoretical Aspects of Computer Science (STACS) (pp. 63--74). https://doi.org/10.4230/LIPIcs.STACS.2014.63
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