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66 Publications
2007 | Journal Article | LibreCat-ID: 10625
Bergmann, N., Platzner, M., & Teich, J. (2007). Dynamically Reconfigurable Architectures (editorial). {EURASIP} Journal on Embedded Systems, 2007, 1–2. https://doi.org/10.1155/2007/28405
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| DOI
2005 | Journal Article | LibreCat-ID: 2412
Enzler, R., Plessl, C., & Platzner, M. (2005). System-level performance evaluation of reconfigurable processors. Microprocessors and Microsystems, 29(2–3), 63–73. https://doi.org/10.1016/j.micpro.2004.06.004
LibreCat
| DOI
2004 | Journal Article | LibreCat-ID: 10742
Steiger, C., Walder, H., & Platzner, M. (2004). Operating systems for reconfigurable embedded platforms: online scheduling of real-time tasks. {IEEE} Transactions on Computers, 53(11), 1393–1407. https://doi.org/10.1109/tc.2004.99
LibreCat
| DOI
2003 | Journal Article | LibreCat-ID: 2420
Plessl, C., & Platzner, M. (2003). Instance-Specific Accelerators for Minimum Covering. Journal of Supercomputing, 26(2), 109–129. https://doi.org/10.1023/a:1024443416592
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| DOI
2003 | Journal Article | LibreCat-ID: 2419
Plessl, C., Enzler, R., Walder, H., Beutel, J., Platzner, M., Thiele, L., & Tröster, G. (2003). The Case for Reconfigurable Hardware in Wearable Computing. Personal and Ubiquitous Computing, 7(5), 299–308. https://doi.org/10.1007/s00779-003-0243-x
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| DOI
2002 | Journal Article | LibreCat-ID: 10651
Eisenring, M., & Platzner, M. (2002). A Framework for Run-time Reconfigurable Systems. The Journal of Supercomputing, 21(2), 145–159. https://doi.org/10.1023/a:1013627403946
LibreCat
| DOI
2001 | Journal Article | LibreCat-ID: 10713
Mencer, O., Platzner, M., Morf, M., & J. Flynn, M. (2001). Object-oriented domain specific compilers for programming FPGAs. {IEEE} Transactions on Very Large Scale Integration ({VLSI}) Systems, 9(1), 205–210. https://doi.org/10.1109/92.920835
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| DOI
2000 | Journal Article | LibreCat-ID: 6507
Platzner, M. (2000). Reconfigurable accelerators for combinatorial problems. Computer, 33(4), 58–60. https://doi.org/10.1109/2.839322
LibreCat
| DOI
2000 | Journal Article | LibreCat-ID: 10725
Platzner, M., Rinner, B., & Weiss, R. (2000). Toward embedded qualitative simulation: a specialized computer architecture for QSim. IEEE Intelligent Systems, 15(2), 62–68. https://doi.org/10.1109/5254.850829
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| DOI
2000 | Journal Article | LibreCat-ID: 10606
Eisenring, M., & Platzner, M. (2000). Synthesis of Interfaces and Communication in Reconfigurable Embedded Systems. IEE Proceedings -- Computers & Digital Techniques, 147, 159–165. https://doi.org/10.1049/ip-cdt:20000496
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| DOI
1998 | Journal Article | LibreCat-ID: 10607
Platzner, M. (1998). Reconfigurable Computer Architectures. E&i Elektrotechnik Und Informationstechnik, 115, 143–148.
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1998 | Journal Article | LibreCat-ID: 10608
Platzner, M., & Rinner, B. (1998). Design and Implementation of a Parallel Constraint Satisfaction Algorithm. International Journal of Computers & Their Applications, 5, 106–116.
LibreCat
1997 | Journal Article | LibreCat-ID: 10724
Platzner, M., Rinner, B., & Weiss, R. (1997). Parallel qualitative simulation. Simulation Practice and Theory, 5(7–8), 623–638. https://doi.org/10.1016/s0928-4869(97)00008-6
LibreCat
| DOI
1997 | Journal Article | LibreCat-ID: 10609
Platzner, M., Rinner, B., & Weiss, R. (1997). A Computer Architecture to Support Qualitative Simulation in Industrial Applications. E & i Elektrotechnik Und Informationstechnik, 114, 13–18.
LibreCat
1995 | Journal Article | LibreCat-ID: 10610
Platzner, M., Rinner, B., & Weiss, R. (1995). Exploiting Parallelism in Constraint Satisfaction for Qualitative Simulation. J.UCS Journal of Universal Computer Science, 12, 811–820.
LibreCat
1993 | Journal Article | LibreCat-ID: 13466
Platzner, M., & Steger, C. (1993). Erfahrungen mit einer Multi-Signalprozessorarchitektur (TMS320C40). Mikroelektronik.
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