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122 Publications


2013 | Conference Paper | LibreCat-ID: 1787
Suess, T., Schoenrock, A., Meisner, S., & Plessl, C. (2013). Parallel Macro Pipelining on the Intel SCC Many-Core Computer. In Proc. Int. Symp. on Parallel and Distributed Processing Workshops (IPDPSW) (pp. 64–73). Washington, DC, USA: IEEE Computer Society. https://doi.org/10.1109/IPDPSW.2013.136
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2013 | Mastersthesis | LibreCat-ID: 521
Riebler, H. (2013). Identifikation und Wiederherstellung von kryptographischen Schlüsseln mit FPGAs. Universität Paderborn.
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2012 | Conference Paper | LibreCat-ID: 2107
Grunzke, R., Birkenheuer, G., Blunk, D., Breuers, S., Brinkmann, A., Gesing, S., … Zink, A. (2012). A Data Driven Science Gateway for Computational Workflows. In Proc. UNICORE Summit.
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2012 | Conference Paper | LibreCat-ID: 612
Rüthing, C., Happe, M., Agne, A., & Plessl, C. (2012). Exploration of Ring Oscillator Design Space for Temperature Measurements on FPGAs. In Proceedings of the International Conference on Field Programmable Logic and Applications (FPL) (pp. 559–562). IEEE. https://doi.org/10.1109/FPL.2012.6339370
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2012 | Journal Article | LibreCat-ID: 2108
Schumacher, T., Plessl, C., & Platzner, M. (2012). IMORC: An Infrastructure and Architecture Template for Implementing High-Performance Reconfigurable FPGA Accelerators. Microprocessors and Microsystems, 36(2), 110–126. https://doi.org/10.1016/j.micpro.2011.04.002
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2012 | Journal Article | LibreCat-ID: 2177
Grad, M., & Plessl, C. (2012). On the Feasibility and Limitations of Just-In-Time Instruction Set Extension for FPGA-based Reconfigurable Processors. Int. Journal of Reconfigurable Computing (IJRC). https://doi.org/10.1155/2012/418315
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2012 | Conference Paper | LibreCat-ID: 567
Barrio, P., Carreras, C., Sierra, R., Kenter, T., & Plessl, C. (2012). Turning control flow graphs into function calls: Code generation for heterogeneous architectures. In Proceedings of the International Conference on High Performance Computing and Simulation (HPCS) (pp. 559–565). IEEE. https://doi.org/10.1109/HPCSim.2012.6266973
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2012 | Conference Paper | LibreCat-ID: 2180
Beisel, T., Wiersema, T., Plessl, C., & Brinkmann, A. (2012). Programming and Scheduling Model for Supporting Heterogeneous Accelerators in Linux. In Proc. Workshop on Computer Architecture and Operating System Co-design (CAOS).
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2012 | Misc | LibreCat-ID: 587
Plessl, C., Platzner, M., Agne, A., Happe, M., & Lübbers, E. (2012). Programming models for reconfigurable heterogeneous multi-cores. Awareness Magazine.
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2012 | Conference Paper | LibreCat-ID: 615
Happe, M., Hangmann, H., Agne, A., & Plessl, C. (2012). Eight Ways to put your FPGA on Fire – A Systematic Study of Heat Generators. In Proceedings of the International Conference on Reconfigurable Computing and FPGAs (ReConFig) (pp. 1–8). IEEE. https://doi.org/10.1109/ReConFig.2012.6416745
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2012 | Conference Paper | LibreCat-ID: 2106
Meyer, B., Schumacher, J., Plessl, C., & Förstner, J. (2012). Convey Vector Personalities – FPGA Acceleration with an OpenMP-like Effort? In Proc. Int. Conf. on Field Programmable Logic and Applications (FPL) (pp. 189–196). IEEE. https://doi.org/10.1109/FPL.2012.6339370
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2012 | Conference Paper | LibreCat-ID: 609
Happe, M., Agne, A., Plessl, C., & Platzner, M. (2012). Hardware/Software Platform for Self-aware Compute Nodes. In Proceedings of the Workshop on Self-Awareness in Reconfigurable Computing Systems (SRCS) (pp. 8–9).
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2012 | Conference Paper | LibreCat-ID: 591
Kenter, T., Plessl, C., & Schmitz, H. (2012). Pragma based parallelization - Trading hardware efficiency for ease of use? In Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig) (pp. 1–8). IEEE. https://doi.org/10.1109/ReConFig.2012.6416773
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2011 | Conference Paper | LibreCat-ID: 2191
Kenter, T., Plessl, C., Platzner, M., & Kauschke, M. (2011). Estimation and Partitioning for CPU-Accelerator Architectures. In Intel European Research and Innovation Conference.
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2011 | Conference Paper | LibreCat-ID: 656
Happe, M., Agne, A., & Plessl, C. (2011). Measuring and Predicting Temperature Distributions on FPGAs at Run-Time. In Proceedings of the 2011 International Conference on Reconfigurable Computing and FPGAs (ReConFig) (pp. 55–60). IEEE. https://doi.org/10.1109/ReConFig.2011.59
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2011 | Book Chapter | LibreCat-ID: 10737
Sekanina, L., Walker, J. A., Kaufmann, P., Plessl, C., & Platzner, M. (2011). Evolution of Electronic Circuits. In Cartesian Genetic Programming (pp. 125–179). Springer Berlin Heidelberg.
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2011 | Conference Paper | LibreCat-ID: 2200
Kenter, T., Platzner, M., Plessl, C., & Kauschke, M. (2011). Performance Estimation Framework for Automated Exploration of CPU-Accelerator Architectures. In Proc. Int. Symp. on Field-Programmable Gate Arrays (FPGA) (pp. 177–180). New York, NY, USA: ACM. https://doi.org/10.1145/1950413.1950448
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2011 | Conference Paper | LibreCat-ID: 2193
Beisel, T., Wiersema, T., Plessl, C., & Brinkmann, A. (2011). Cooperative multitasking for heterogeneous accelerators in the Linux Completely Fair Scheduler. In Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP) (pp. 223–226). IEEE Computer Society. https://doi.org/10.1109/ASAP.2011.6043273
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2011 | Conference Paper | LibreCat-ID: 2198
Grad, M., & Plessl, C. (2011). Just-in-time Instruction Set Extension – Feasibility and Limitations for an FPGA-based Reconfigurable ASIP Architecture. In Proc. Reconfigurable Architectures Workshop (RAW) (pp. 278–285). IEEE Computer Society. https://doi.org/10.1109/IPDPS.2011.153
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2011 | Journal Article | LibreCat-ID: 2201
Schumacher, T., Süß, T., Plessl, C., & Platzner, M. (2011). FPGA Acceleration of Communication-bound Streaming Applications: Architecture Modeling and a 3D Image Compositing Case Study. Int. Journal of Recon- Figurable Computing (IJRC). https://doi.org/10.1155/2011/760954
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