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265 Publications


2015 | Conference Paper | LibreCat-ID: 24292
C. Scheytt and A. R. Javed, “Mixed-Signal Baseband Processing for 100 Gbit/s Communications,” 2015.
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2015 | Conference Paper | LibreCat-ID: 24297
A. R. Javed, C. Scheytt, R. Kraemer, T. Messinger, and I. Kallfass, “Mixed-mode Baseband for 100 Gbit/s Wireless Communications,” Nürnberg, Germany, 2015.
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2015 | Conference Paper | LibreCat-ID: 24296
A. R. Javed, “PSSS baseband receiver circuit design,” Nürnberg, Germany, 2015.
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2015 | Newspaper Article | LibreCat-ID: 24295
C. Scheytt and A. R. Javed, “100 Gigabit pro Sekunde und mehr für das drahtlose Hochgeschwindigkeits-Internet,” ForschungsForum Paderborn, no. 18, pp. 25–30, 2015.
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2015 | Conference Paper | LibreCat-ID: 24290
S. Gudyriev and C. Scheytt, “Silicon photonics 90° optical hybrid design for coherent receivers,” in Kleinheubacher Tagung 2015, 2015, p. 18.
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2015 | Book (Editor) | LibreCat-ID: 53590
D. Müller-Gridschneder, W. Müller, and S. Mitra, Eds., Proceedings of the 1st International Workshop on Resiliency in Embedded Electronic Systems. Amsterdam, Netherlands, 2015.
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2014 | Conference Paper | LibreCat-ID: 24300
J. Wessel, K. Schmalz, B. Cahill, and C. Scheytt, “Design of an Electrical Interferometer at 120 GHz for Contactless Permittivity Characterization,” 2014.
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2014 | Conference Paper | LibreCat-ID: 24305
F. Mischkalla and W. Müller, “Architectural Low-Power Design Using Transaction-Based System Modeling and Simulation,” 2014, doi: 10.1109/SAMOS.2014.6893219.
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2014 | Conference Paper | LibreCat-ID: 24308
J. Wessel, K. Schmalz, C. Scheytt, and C. Meliani, “ Switchable slow wave transmission line in 130 nm SiGe technology at 115 GHz for phase detection based biosensors,” in Microwave Symposium (IMS), 2014 IEEE MTT-S International, 2014, pp. 1–3, doi: 10.1109/MWSYM.2014.6848446.
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2014 | Conference Paper | LibreCat-ID: 24303
J. Wessel, K. Schmalz, C. Scheytt, C. Meliani, and B. Cahill, “A 7 GHz biosensor for permittivity change with enhanced sensitivity through phase compensation,” in European Microwave Conference (EuMC), 2014, vol. 44th, pp. 699–702, doi: 10.1109/EuMC.2014.6986530.
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2014 | Conference Paper | LibreCat-ID: 24307
R. Kraemer, A. Wolf, C. Scheytt, I. Kallfass, and K. KrishneGowda, “Wireless 100 Gb/s: PHY layer Overview and Challenges in THz freqency band,” 2014, doi: 10.1109/WAMICON.2014.6857743.
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2014 | Journal Article | LibreCat-ID: 24302
B. Koppelmann, B. Messidat, M. Becker, C. Kuznik, W. Müller, and C. Scheytt, “Fast and Open Virtual Platforms for TriCore-based SoCs Using QEMU,” Design and Verification Conference (DVCON EUROPE), 2014.
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2014 | Journal Article | LibreCat-ID: 24309
C. Kuznik and W. Müller, “Verific-MM: Systematized Verification Metrics Generation with UCIS for Improved Automation on Verification Closure,” Design, Automation and Test in Europe DATE, University Booth, Dresden, 2014.
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2014 | Conference Paper | LibreCat-ID: 24304
C. Scheytt, “System-on-Chip Design für Funkfrequenzen oberhalb von 100 GHz-Herausforderungen und potenzielle Anwendungen,” 2014.
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2014 | Journal Article | LibreCat-ID: 24306
M. Elkhouly, Y. Mao, C. Meliani, C. Scheytt, and F. Ellinger, “A -Band Four-Element Butler Matrix in 0.13 µm SiGe BiCMOS Technology,” IEEE JOURNAL OF SOLID-STATE CIRCUITS, vol. 49, no. 9, 2014.
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2014 | Conference Paper | LibreCat-ID: 24311
J.-H. Oetjens et al., “Safety Evaluation of Automotive Electronics Using Virtual Prototypes: State of the Art and Research Challenges,” 2014, doi: 10.1145/2593069.2602976.
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2014 | Conference Paper | LibreCat-ID: 24301
C. Scheytt, “mm-Wellen- und Electronic-Photonic System-on-Chip Design,” 2014.
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2014 | Conference Paper | LibreCat-ID: 25120
F. Mischkalla and W. Müller, “Architectural Low-Power Design Using Transaction-Based System Simulation,” Greece, Sep. 2014, IEEE, 2014.
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2014 | Conference Paper | LibreCat-ID: 25146
M. tech. M. M. Joy, W. Müller, and F.-J. Rammig, “Source code annotated memory leak detection for soft real time embedded systems with resource constraints,” 2014.
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2014 | Conference Paper | LibreCat-ID: 25144
F. Mischkalla and W. Müller, “Advanced SoC Virtual Prototyping for System-Level Power Planning and Validation,” 2014.
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