Please note that LibreCat no longer supports Internet Explorer versions 8 or 9 (or earlier).
We recommend upgrading to the latest Internet Explorer, Google Chrome, or Firefox.
5711 Publications
2010 | Conference Paper | LibreCat-ID: 37042
Mischkalla F, Müller W, He D. A UML Profile for SysML-Based Comodeling for Embedded Systems Simulation and Synthesis. In: Proceedings of the M-BED Workshop. ; 2010.
LibreCat
2010 | Conference Paper | LibreCat-ID: 37043
Bol A, Müller W, Krupp A. Eine strukturierte Methode zur Generierung von SystemVerilog-Testumgebungen aus textuellen Anforderungsbeschreibungen. In: Methoden Und Beschreibungssprachen Zur Modellierung Und Verifikation von Schaltungen Und Systemen (MBMV). ; 2010.
LibreCat
2010 | Conference Paper | LibreCat-ID: 37050
Müller W, He D, Mischkalla F, et al. The SATURN Approach to SysML-based HW/SW Codesign. In: Proceedings of the IEEE Computer Society Annual Symposium on VLSI. Lecture Notes in Electrical Engineering. ; 2010. doi:10.1007/978-94-007-1488-5_9
LibreCat
| DOI
2010 | Conference Paper | LibreCat-ID: 37048
Müller W, Bol A, Krupp A, Lundkvist O. Generation of Executable Testbenches from Natural Language Requirement Specifications for Embedded Real-Time Systems. In: Kleinjohann L, Kleinjohann B, eds. Springer Verlag; 2010. doi:10.1007/978-3-642-15234-4_9
LibreCat
| DOI
2010 | Conference Paper | LibreCat-ID: 37049
Xie T, Letombe F, Müller W. Mutation-Analysis Directed Constrained Random Verification. In: Kleinjohann L, Kleinjohann B, eds. Springer Verlag; 2010.
LibreCat
2010 | Conference Paper | LibreCat-ID: 37051
Xie T, Defo GB, Müller W. An Eclipse-based Framework for the IP-XACT-enabled Assembly of Mixed-Level IPs. In: ; 2010.
LibreCat
2010 | Conference Paper | LibreCat-ID: 37057
Defo GB, Müller W, Kuznik C. Verification of a CAN Bus Model in SystemC with Functional Coverage. In: Proceedings of SIES 2010. IEEE; 2010. doi:10.1109/SIES.2010.5551379
LibreCat
| DOI
2010 | Conference Paper | LibreCat-ID: 37056
Klobedanz K, Defo GB, Müller W, Kerstan T. Distributed Coordination of Task Migration for Fault-Tolerant FlexRay Networks. In: Proceedings of SIES 2010. ; 2010. doi:10.1109/SIES.2010.5551384
LibreCat
| DOI
2010 | Conference Paper | LibreCat-ID: 37053
Müller W, da S. Oliveira MF, Zabel H, Becker M. Verification of Real-Time Properties for Hardware-Dependant Software. In: Proceedings of HLDVT2010. IEEE; 2010.
LibreCat
2010 | Conference Paper | LibreCat-ID: 37060
Oliveira MFS, do Nascimento FAM, Müller W. Design Space Abstraction and Metamodeling for Embedded Systems Design Space Exploration. In: Proceedings of MoMPES 2010. ; 2010.
LibreCat
2010 | Journal Article | LibreCat-ID: 8179 | 
Gharibian S. Strong NP-hardness of the quantum separability problem. Quantum Information & Computation. 2010;10(3{\ & }4):343-360.
LibreCat
| Download (ext.)
| arXiv
2010 | Conference Paper | LibreCat-ID: 2223
Lübbers E, Platzner M, Plessl C, Keller A, Plattner B. Towards Adaptive Networking for Embedded Devices based on Reconfigurable Hardware. In: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA). CSREA Press; 2010:225-231.
LibreCat
2010 | Conference Paper | LibreCat-ID: 2216
Grad M, Plessl C. Pruning the Design Space for Just-In-Time Processor Customization. In: Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig). IEEE Computer Society; 2010:67-72. doi:10.1109/ReConFig.2010.19
LibreCat
| DOI
2010 | Conference Paper | LibreCat-ID: 2224
Grad M, Plessl C. An Open Source Circuit Library with Benchmarking Facilities. In: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA). CSREA Press; 2010:144-150.
LibreCat
2010 | Conference Paper | LibreCat-ID: 2220
Andrews D, Plessl C. Configurable Processor Architectures: History and Trends. In: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA). CSREA Press; 2010:165.
LibreCat
2010 | Conference (Editor) | LibreCat-ID: 2222
Plaks TP, Andrews D, DeMara R, et al., eds. Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA). CSREA Press; 2010.
LibreCat
2010 | Conference Paper | LibreCat-ID: 2226
Beisel T, Niekamp M, Plessl C. Using Shared Library Interposing for Transparent Acceleration in Systems with Heterogeneous Hardware Accelerators. In: Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP). IEEE Computer Society; 2010:65-72. doi:10.1109/ASAP.2010.5540798
LibreCat
| DOI
2010 | Conference Paper | LibreCat-ID: 2206
Keller A, Plattner B, Lübbers E, Platzner M, Plessl C. Reconfigurable Nodes for Future Networks. In: Proc. IEEE Globecom Workshop on Network of the Future (FutureNet). IEEE; 2010:372-376. doi:10.1109/GLOCOMW.2010.5700341
LibreCat
| DOI
2010 | Conference Paper | LibreCat-ID: 2227
Woehrle M, Plessl C, Thiele L. Rupeas: Ruby Powered Event Analysis DSL. In: Proc. Int. Conf. Networked Sensing Systems (INSS). IEEE; 2010:245-248. doi:10.1109/INSS.2010.5572211
LibreCat
| DOI
2010 | Conference Paper | LibreCat-ID: 2228
Kenter T, Platzner M, Plessl C, Kauschke M. Performance Estimation for the Exploration of CPU-Accelerator Architectures. In: Hammami O, Larrabee S, eds. Proc. Workshop on Architectural Research Prototyping (WARP), International Symposium on Computer Architecture (ISCA). ; 2010.
LibreCat