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5711 Publications
2010 | Conference Paper | LibreCat-ID: 37042
Mischkalla, F., Müller, W., & He, D. (2010). A UML Profile for SysML-Based Comodeling for Embedded Systems Simulation and Synthesis. Proceedings of the M-BED Workshop.
LibreCat
2010 | Conference Paper | LibreCat-ID: 37043
Bol, A., Müller, W., & Krupp, A. (2010). Eine strukturierte Methode zur Generierung von SystemVerilog-Testumgebungen aus textuellen Anforderungsbeschreibungen. Methoden Und Beschreibungssprachen Zur Modellierung Und Verifikation von Schaltungen Und Systemen (MBMV).
LibreCat
2010 | Conference Paper | LibreCat-ID: 37050
Müller, W., He, D., Mischkalla, F., Wegele, A., Larkham, A., Whiston, P., Penil, P., Villar, E., Mitas, N., Kritharidis, D., Azcarate, F., & Carballeda, M. (2010). The SATURN Approach to SysML-based HW/SW Codesign. Proceedings of the IEEE Computer Society Annual Symposium on VLSI. https://doi.org/10.1007/978-94-007-1488-5_9
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| DOI
2010 | Conference Paper | LibreCat-ID: 37048
Müller, W., Bol, A., Krupp, A., & Lundkvist, O. (2010). Generation of Executable Testbenches from Natural Language Requirement Specifications for Embedded Real-Time Systems (L. Kleinjohann & B. Kleinjohann, Eds.). Springer Verlag. https://doi.org/10.1007/978-3-642-15234-4_9
LibreCat
| DOI
2010 | Conference Paper | LibreCat-ID: 37049
Xie, T., Letombe, F., & Müller, W. (2010). Mutation-Analysis Directed Constrained Random Verification (L. Kleinjohann & B. Kleinjohann, Eds.). Springer Verlag.
LibreCat
2010 | Conference Paper | LibreCat-ID: 37051
Xie, T., Defo, G. B., & Müller, W. (2010). An Eclipse-based Framework for the IP-XACT-enabled Assembly of Mixed-Level IPs. First Workshop on Hands-on Platforms and tools for model-based engineering of Embedded Systems (HoPES 2010), Paris.
LibreCat
2010 | Conference Paper | LibreCat-ID: 37057
Defo, G. B., Müller, W., & Kuznik, C. (2010). Verification of a CAN Bus Model in SystemC with Functional Coverage. Proceedings of SIES 2010. International Symposium on Industrial Embedded System (SIES), Trento, Italy. https://doi.org/10.1109/SIES.2010.5551379
LibreCat
| DOI
2010 | Conference Paper | LibreCat-ID: 37056
Klobedanz, K., Defo, G. B., Müller, W., & Kerstan, T. (2010). Distributed Coordination of Task Migration for Fault-Tolerant FlexRay Networks. Proceedings of SIES 2010. International Symposium on Industrial Embedded System (SIES). https://doi.org/10.1109/SIES.2010.5551384
LibreCat
| DOI
2010 | Conference Paper | LibreCat-ID: 37053
Müller, W., da S. Oliveira, M. F., Zabel, H., & Becker, M. (2010). Verification of Real-Time Properties for Hardware-Dependant Software. Proceedings of HLDVT2010. IEEE International High Level Design Validation and Test Workshop (HLDVT), Anaheim, FL, USA.
LibreCat
2010 | Conference Paper | LibreCat-ID: 37060
Oliveira, M. F. S., do Nascimento, F. A. M., & Müller, W. (2010). Design Space Abstraction and Metamodeling for Embedded Systems Design Space Exploration. Proceedings of MoMPES 2010.
LibreCat
2010 | Journal Article | LibreCat-ID: 8179 | 
Gharibian, S. (2010). Strong NP-hardness of the quantum separability problem. Quantum Information & Computation, 10(3{\ & }4), 343–360.
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| Download (ext.)
| arXiv
2010 | Conference Paper | LibreCat-ID: 2223
Lübbers, E., Platzner, M., Plessl, C., Keller, A., & Plattner, B. (2010). Towards Adaptive Networking for Embedded Devices based on Reconfigurable Hardware. Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 225–231.
LibreCat
2010 | Conference Paper | LibreCat-ID: 2216
Grad, M., & Plessl, C. (2010). Pruning the Design Space for Just-In-Time Processor Customization. Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig), 67–72. https://doi.org/10.1109/ReConFig.2010.19
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| DOI
2010 | Conference Paper | LibreCat-ID: 2224
Grad, M., & Plessl, C. (2010). An Open Source Circuit Library with Benchmarking Facilities. Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 144–150.
LibreCat
2010 | Conference Paper | LibreCat-ID: 2220
Andrews, D., & Plessl, C. (2010). Configurable Processor Architectures: History and Trends. Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 165.
LibreCat
2010 | Conference (Editor) | LibreCat-ID: 2222
Plaks, T. P., Andrews, D., DeMara, R., Lam, H., Lee, J., Plessl, C., & Stitt, G. (Eds.). (2010). Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA). CSREA Press.
LibreCat
2010 | Conference Paper | LibreCat-ID: 2226
Beisel, T., Niekamp, M., & Plessl, C. (2010). Using Shared Library Interposing for Transparent Acceleration in Systems with Heterogeneous Hardware Accelerators. Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP), 65–72. https://doi.org/10.1109/ASAP.2010.5540798
LibreCat
| DOI
2010 | Conference Paper | LibreCat-ID: 2206
Keller, A., Plattner, B., Lübbers, E., Platzner, M., & Plessl, C. (2010). Reconfigurable Nodes for Future Networks. Proc. IEEE Globecom Workshop on Network of the Future (FutureNet), 372–376. https://doi.org/10.1109/GLOCOMW.2010.5700341
LibreCat
| DOI
2010 | Conference Paper | LibreCat-ID: 2227
Woehrle, M., Plessl, C., & Thiele, L. (2010). Rupeas: Ruby Powered Event Analysis DSL. Proc. Int. Conf. Networked Sensing Systems (INSS), 245–248. https://doi.org/10.1109/INSS.2010.5572211
LibreCat
| DOI
2010 | Conference Paper | LibreCat-ID: 2228
Kenter, T., Platzner, M., Plessl, C., & Kauschke, M. (2010). Performance Estimation for the Exploration of CPU-Accelerator Architectures. In O. Hammami & S. Larrabee (Eds.), Proc. Workshop on Architectural Research Prototyping (WARP), International Symposium on Computer Architecture (ISCA).
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