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369 Publications

2016 | Bachelorsthesis | LibreCat-ID: 10695
J. Horstmann, Beschleunigte Simulation elektrischer Stromnetze mit GPUs. Paderborn University, 2016.

2016 | Book | LibreCat-ID: 10758
G. Squillero et al., Applications of Evolutionary Computation - 19th European Conference, EvoApplications, vol. 9597. Springer, 2016.

2016 | Conference Paper | LibreCat-ID: 13151
T. Graf and M. Platzner, “Using Deep Convolutional Neural Networks in Monte Carlo Tree Search,” in Computer and Games, 2016.

2016 | Conference Paper | LibreCat-ID: 15873
A. Boschmann, A. Agne, L. M. Witschen, G. Thombansen, F. Kraus, and M. Platzner, “FPGA-based acceleration of high density myoelectric signal processing,” in 2015 International Conference on ReConFigurable Computing and FPGAs (ReConFig), Mexiko City, Mexiko, 2016.
LibreCat | DOI

2015 | Mastersthesis | LibreCat-ID: 10615
A. F. Ahmed, Self-Optimizing Organic Cache. Paderborn University, 2015.

2015 | Conference Paper | LibreCat-ID: 10711
S. Meisner and M. Platzner, “Comparison of thread signatures for error detection in hybrid multi-cores,” in Field Programmable Technology (FPT), 2015 International Conference on, 2015, pp. 212–215.
LibreCat | DOI

2015 | Bachelorsthesis | LibreCat-ID: 3364
C. Knorr, Evaluation von Bildverarbeitungsalgorithmen in heterogenen Rechenknoten. Universität Paderborn, 2015.

2015 | Conference Paper | LibreCat-ID: 10767
I. Ghribi, R. Ben Abdallah, M. Khalgui, and M. Platzner, “New Codesign Solutions for Modelling and Partitioning of Probabilistic Reconfigurable Embedded Software,” in Proceedings of the 29th European Simulation and Modelling Conference (ESM), 2015.

2015 | Conference Paper | LibreCat-ID: 10779
Z. Guettatfi, O. Kermia, and A. Khouas, “Over effective hard real-time hardware tasks scheduling and allocation,” in 25th International Conference on Field Programmable Logic and Applications (FPL), 2015.
LibreCat | DOI

2015 | Conference Paper | LibreCat-ID: 10673
N. Ho, A. F. Ahmed, P. Kaufmann, and M. Platzner, “Microarchitectural optimization by means of reconfigurable and evolvable cache mappings,” in Proc. NASA/ESA Conf. Adaptive Hardware and Systems (AHS), 2015, pp. 1–7.
LibreCat | DOI

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