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403 Publications


2009 | Conference Paper | LibreCat-ID: 13635
Giefers, H., & Platzner, M. (2009). ARMLang: A Language and Compiler for Programming Reconfigurable Mesh Many-Cores. In Reconfigurable Architectures Workshop (RAW), Proceedings of the International Parallel and Distributed Processing Symposium. IEEE.
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2009 | Conference Paper | LibreCat-ID: 13636
Lübbers, E., & Platzner, M. (2009). Cooperative Multithreading in Dynamically Reconfigurable Systems. In Proceedings of the 19th International Workshop on Field Programmable Logic and Applications (FPL) . IEEE.
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2009 | Conference Paper | LibreCat-ID: 13637
Giefers, H., & Platzner, M. (2009). Program-driven Fine-grained Power Management for the Reconfigurable Mesh. In Proceedings of the 19th International Workshop on Field Programmable Logic and Applications (FPL) . IEEE.
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2009 | Conference Paper | LibreCat-ID: 13638
Happe, M., Lübbers, E., & Platzner, M. (2009). An adaptive Sequential Monte Carlo framework with runtime HW/SW repartitioning. In Proceedings of the 2009 International Conference on Field-Programmable Technology (FPT). IEEE. https://doi.org/10.1109/fpt.2009.5377645
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2009 | Conference Paper | LibreCat-ID: 13639
Drzevitzky, S., Kastens, U., & Platzner, M. (2009). Proof-carrying Hardware: Towards Runtime Verification of Reconfigurable Modules. In Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig). IEEE.
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2008 | Conference Paper | LibreCat-ID: 2358
Beisel, T., Lietsch, S., & Thielemans, K. (2008). A method for OSEM PET reconstruction on parallel architectures using STIR. In IEEE Nuclear Science Symposium Conference Record (NSS) (pp. 4161–4168). IEEE. https://doi.org/10.1109/NSSMIC.2008.4774198
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2008 | Conference Paper | LibreCat-ID: 2364
Schumacher, T., Meiche, R., Kaufmann, P., Lübbers, E., Plessl, C., & Platzner, M. (2008). A Hardware Accelerator for k-th Nearest Neighbor Thinning. In Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA) (pp. 245–251). CSREA Press.
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2008 | Conference Paper | LibreCat-ID: 2365
Platzner, M., Döhre, S., Happe, M., Kenter, T., Lorenz, U., Schumacher, T., … Warkentin, A. (2008). The GOmputer: Accelerating GO with FPGAs. In Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA) (pp. 245–251). CSREA Press.
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2008 | Conference Paper | LibreCat-ID: 2372
Schumacher, T., Plessl, C., & Platzner, M. (2008). IMORC: An infrastructure for performance monitoring and optimization of reconfigurable computers. In Many-core and Reconfigurable Supercomputing Conference (MRSC).
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2008 | Bachelorsthesis | LibreCat-ID: 10628
Boschmann, A. (2008). Aufbau und experimentelle Bewertung eines Systems zur Langzeitklassifikation von EMG-Signalen. Paderborn University.
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2008 | Bachelorsthesis | LibreCat-ID: 10641
Breitlauch, D. (2008). Selbstoptimierender Cache-Kontroller. Paderborn University.
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2008 | Bachelorsthesis | LibreCat-ID: 10644
Ceylan, T., & Yalcin, C. (2008). Verteilte Simulation von mobilen Robotern mit EyeSim. Paderborn University.
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2008 | Conference Paper | LibreCat-ID: 10653
Glette, K., Gruber, T., Kaufmann, P., Torresen, J., Sick, B., & Platzner, M. (2008). Comparing Evolvable Hardware to Conventional Classifiers for Electromyographic Prosthetic Hand Control. In IEEE Adaptive Hardware and Systems (AHS) (pp. 32–39). IEEE.
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2008 | Conference Paper | LibreCat-ID: 10656
Glette, K., Torresen, J., Kaufmann, P., & Platzner, M. (2008). A Comparison of Evolvable Hardware Architectures for Classification Tasks. In IEEE Intl. Conf. on Evolvable Systems (ICES) (Vol. 5216, pp. 22–33). Springer.
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2008 | Mastersthesis | LibreCat-ID: 10669
Happe, M. (2008). Parallelisierung und Hardware- / Software - Codesign von Partikelfiltern. Paderborn University.
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2008 | Preprint | LibreCat-ID: 10690
Torresen, J., Glette, K., Platzner, M., & Kaufmann, P. (2008). Evolvable Hardware - Tutorial at Architecture of Computing Systems (ARCS).
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2008 | Conference Paper | LibreCat-ID: 10691
Kaufmann, P., & Platzner, M. (2008). Advanced Techniques for the Creation and Propagation of Modules in Cartesian Genetic Programming. In Genetic and Evolutionary Computation (GECCO) (pp. 1219–1226). ACM Press.
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2008 | Bachelorsthesis | LibreCat-ID: 10696
Knieper, T. (2008). Implementierung und Bewertung des multikriteriellen Optimierungsverfahrens IBEA für den automatisierten Schaltungsentwurf. Paderborn University.
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2008 | Conference Paper | LibreCat-ID: 10698
Knieper, T., Defo, B., Kaufmann, P., & Platzner, M. (2008). On Robust Evolution of Digital Hardware. In Biologically Inspired Collaborative Computing (BICC) (Vol. 268, pp. 2313–222). Springer.
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2008 | Bachelorsthesis | LibreCat-ID: 10718
Niklas, J. (2008). Eine Monitoring- und Debugging-Infrastruktur für hybride HW/SW-Systeme. Paderborn University.
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2008 | Bachelorsthesis | LibreCat-ID: 10721
Östermann, M. (2008). Raytracing on a Custom Instruction Set CPU. Paderborn University.
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2008 | Bachelorsthesis | LibreCat-ID: 10751
Westerheide, N. (2008). Design and Evaluation of MicroBlaze Multi-core Architectures. Paderborn University.
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2008 | Conference Paper | LibreCat-ID: 10778
Ghasemzadeh Mohammadi, H., Tabkhi, H., Miremadi, S. G., & Ejlali, A. (2008). A cost-effective error detection and roll-back recovery technique for embedded microprocessor control logic. In 2008 International Conference on Microelectronics (pp. 444–447). IEEE. https://doi.org/10.1109/ICM.2008.5393497
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2008 | Conference Paper | LibreCat-ID: 13629
Giefers, H., & Platzner, M. (2008). Realizing Reconfigurable Mesh Algorithms on Softcore Arrays. In Proceedings of the International Symposium on Systems, Architectures, Modeling and Simulation (SAMOS). IEEE.
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2008 | Conference Paper | LibreCat-ID: 13630
Lübbers, E., & Platzner, M. (2008). Communication and Synchronization in Multithreaded Reconfigurable Computing Systems. In Proceedings of the 8th International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA). CSREA Press.
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2008 | Conference Paper | LibreCat-ID: 13631
Lübbers, E., & Platzner, M. (2008). A portable abstraction layer for hardware threads. In Proceedings of the 18th International Conference on Field Programmable Logic and Applications (FPL). IEEE. https://doi.org/10.1109/fpl.2008.4629901
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2007 | Conference Paper | LibreCat-ID: 6508
Kaufmann, P., & Platzner, M. (2007). MOVES: A Modular Framework for Hardware Evolution. In Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007) (pp. 447–454). Edinburgh, UK: IEEE. https://doi.org/10.1109/ahs.2007.73
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2007 | Mastersthesis | LibreCat-ID: 10623
Beisel, T. (2007). Entwurf und Evaluation eines parallelen Verfahrens zur Bildrekonstruktion in der Positronen-Emissions-Tomographie auf Multi-Core-Architekturen. Paderborn University.
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2007 | Journal Article | LibreCat-ID: 10625
Bergmann, N., Platzner, M., & Teich, J. (2007). Dynamically Reconfigurable Architectures (editorial). {EURASIP} Journal on Embedded Systems, 2007, 1–2. https://doi.org/10.1155/2007/28405
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2007 | Bachelorsthesis | LibreCat-ID: 10643
Ceylan, T., & Yalcin, C. (2007). Distributed Simulation of mobile Robots using EyeSim. Paderborn University.
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2007 | Journal Article | LibreCat-ID: 10646
Danne, K., Mühlenbernd, R., & Platzner, M. (2007). Server-based execution of periodic tasks on dynamically reconfigurable hardware. IET Computers Digital Techniques, 1(4), 295–302. https://doi.org/10.1049/iet-cdt:20060186
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2007 | Mastersthesis | LibreCat-ID: 10647
Defo, B. (2007). A Comparison of Multi-Objective Evolutionary Algorithms for Automated Circuit Design and Optimization. Paderborn University.
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2007 | Mastersthesis | LibreCat-ID: 10648
Döhre, S. (2007). Entwurf und Implementierung einer RocketIO-basierten Kommunikationsschnittstelle für Multi-FPGA Systeme. Paderborn University.
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2007 | Conference Paper | LibreCat-ID: 10689
Kaufmann, P., & Platzner, M. (2007). Toward Self-adaptive Embedded Systems: Multi-objective Hardware Evolution. In Architecture of Computing Systems (ARCS) (Vol. 4415, pp. 199–208). Springer.
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2007 | Bachelorsthesis | LibreCat-ID: 10709
Meiche, R. (2007). VHDL-Implementierung eines Clustering-Verfahrens für multikriterielle Optimierungsalgorithmen. Paderborn University.
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2007 | Mastersthesis | LibreCat-ID: 10728
Reisch, W. (2007). Bildverarbeitungs-Architekturen und -Bibliotheken für das rekonfigurierbare Betriebssystem ReconOS. Paderborn University.
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2007 | Mastersthesis | LibreCat-ID: 10729
Rethmeier, E. (2007). Konzeption und Implementierung einer Microsoft Windows CE 5.0 Plattform für ein ARM-basiertes eingebettetes Rechnersystem. Paderborn University.
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2007 | Conference Paper | LibreCat-ID: 10735
Schumacher, T., Lübbers, E., Kaufmann, P., & Platzner, M. (2007). Accelerating the Cube Cut Problem with an FPGA-Augmented Compute Cluster. In Proceedings of the ParaFPGA Symposium, International Conference on Parallel Computing: Architectures, Algorithms and Applications (PARCO) (Vol. 15, pp. 749–756). IOS Press.
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2007 | Conference Paper | LibreCat-ID: 13627
Giefers, H., & Platzner, M. (2007). A Many-Core Implementation Based on the Reconfigurable Mesh Model. In Proceedings of the 17th International Conference on Field Programmable Logic and Applications (FPL). IEEE. https://doi.org/10.1109/fpl.2007.4380623
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2007 | Conference Paper | LibreCat-ID: 13628
Lübbers, E., & Platzner, M. (2007). ReconOS: An RTOS Supporting Hard-and Software Threads. In Proceedings of the 17th International Conference on Field Programmable Logic and Applications (FPL). IEEE. https://doi.org/10.1109/fpl.2007.4380686
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2006 | Conference Paper | LibreCat-ID: 2401
Plessl, C., Platzner, M., & Thiele, L. (2006). Optimal Temporal Partitioning based on Slowdown and Retiming. In Proc. Int. Conf. on Field Programmable Technology (ICFPT) (pp. 345–348). IEEE Computer Society. https://doi.org/10.1109/FPT.2006.270344
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2006 | Conference Paper | LibreCat-ID: 10688
Kaufmann, P., & Platzner, M. (2006). Multi-objective Intrinsic Hardware Evolution. In Intl. Conf. Military Applications of Programmable Logic Devices (MAPLD).
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2006 | Bachelorsthesis | LibreCat-ID: 10716
Mühlenbernd, R. (2006). FPGA-Implementierung eines server-basierten Schedulers für periodische Hardwaretasks. Paderborn University.
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2006 | Conference Paper | LibreCat-ID: 13624
Danne, K., Mühlenbernd, R., & Platzner, M. (2006). Executing Hardware Tasks on Dynamically Reconfigurable Devices under Real-time Conditions. In Proceedings of the 16th International Conference on Field Programmable Logic and Applications (FPL). IEEE.
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2006 | Conference Paper | LibreCat-ID: 13625
Danne, K., & Platzner, M. (2006). An EDF Schedulability Test for Periodic Tasks on Reconfigurable Hardware Devices. In In ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES).
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2006 | Conference Paper | LibreCat-ID: 13626
Danne, K., & Platzner, M. (2006). Partitioned Scheduling of Periodic Real-time Tasks onto Reconfigurable Hardware. In Proceedings of the 13th Reconfigurable Architectures Workshop (RAW). IEEE CS Press.
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2005 | Conference Paper | LibreCat-ID: 2411
Plessl, C., & Platzner, M. (2005). Zippy – A coarse-grained reconfigurable array with support for hardware virtualization. In Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP) (pp. 213–218). IEEE Computer Society. https://doi.org/10.1109/ASAP.2005.69
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2005 | Journal Article | LibreCat-ID: 2412
Enzler, R., Plessl, C., & Platzner, M. (2005). System-level performance evaluation of reconfigurable processors. Microprocessors and Microsystems, 29(2–3), 63–73. https://doi.org/10.1016/j.micpro.2004.06.004
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2005 | Conference Paper | LibreCat-ID: 13621
Danne, K., & Platzner, M. (2005). Periodic real-time scheduling for FPGA computers. In Proceedings of the Third International Workshop on Intelligent Solutions in Embedded Systems (WISES). https://doi.org/10.1109/wises.2005.1438720
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2005 | Conference Paper | LibreCat-ID: 13622
Danne, K., & Platzner, M. (2005). Memory-demanding Periodic Real-time Applications on FPGA Computers. In Work-in-Progress Proceedings of the 17th Euromicro Conference on Real-time Systems (ECRTS).
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