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366 Publications


2007 | Mastersthesis | LibreCat-ID: 10648
Entwurf und Implementierung einer RocketIO-basierten Kommunikationsschnittstelle für Multi-FPGA Systeme
S. Döhre, Entwurf Und Implementierung Einer RocketIO-Basierten Kommunikationsschnittstelle Für Multi-FPGA Systeme, Paderborn University, 2007.
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2007 | Conference Paper | LibreCat-ID: 13628
ReconOS: An RTOS Supporting Hard-and Software Threads
E. Lübbers, M. Platzner, in: Proceedings of the 17th International Conference on Field Programmable Logic and Applications (FPL), IEEE, 2007.
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2007 | Journal Article | LibreCat-ID: 10625
Dynamically Reconfigurable Architectures (editorial)
N. Bergmann, M. Platzner, J. Teich, {EURASIP} Journal on Embedded Systems 2007 (2007) 1–2.
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2006 | Bachelorsthesis | LibreCat-ID: 10716
FPGA-Implementierung eines server-basierten Schedulers für periodische Hardwaretasks
R. Mühlenbernd, FPGA-Implementierung Eines Server-Basierten Schedulers Für Periodische Hardwaretasks, Paderborn University, 2006.
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2006 | Conference Paper | LibreCat-ID: 13626
Partitioned Scheduling of Periodic Real-time Tasks onto Reconfigurable Hardware
K. Danne, M. Platzner, in: Proceedings of the 13th Reconfigurable Architectures Workshop (RAW), IEEE CS Press, 2006.
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2006 | Conference Paper | LibreCat-ID: 2401
Optimal Temporal Partitioning based on Slowdown and Retiming
C. Plessl, M. Platzner, L. Thiele, in: Proc. Int. Conf. on Field Programmable Technology (ICFPT), IEEE Computer Society, 2006, pp. 345–348.
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2006 | Conference Paper | LibreCat-ID: 13624
Executing Hardware Tasks on Dynamically Reconfigurable Devices under Real-time Conditions
K. Danne, R. Mühlenbernd, M. Platzner, in: Proceedings of the 16th International Conference on Field Programmable Logic and Applications (FPL), IEEE, 2006.
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2006 | Conference Paper | LibreCat-ID: 10688
Multi-objective Intrinsic Hardware Evolution
P. Kaufmann, M. Platzner, in: Intl. Conf. Military Applications of Programmable Logic Devices (MAPLD), 2006.
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2006 | Conference Paper | LibreCat-ID: 13625
An EDF Schedulability Test for Periodic Tasks on Reconfigurable Hardware Devices
K. Danne, M. Platzner, in: In ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES), 2006.
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2005 | Conference Paper | LibreCat-ID: 13621
Periodic real-time scheduling for FPGA computers
K. Danne, M. Platzner, in: Proceedings of the Third International Workshop on Intelligent Solutions in Embedded Systems (WISES), 2005.
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2005 | Journal Article | LibreCat-ID: 2412
System-level performance evaluation of reconfigurable processors
R. Enzler, C. Plessl, M. Platzner, Microprocessors and Microsystems 29 (2005) 63–73.
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2005 | Conference Paper | LibreCat-ID: 13622
Memory-demanding Periodic Real-time Applications on FPGA Computers
K. Danne, M. Platzner, in: Work-in-Progress Proceedings of the 17th Euromicro Conference on Real-Time Systems (ECRTS), 2005.
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2005 | Conference Paper | LibreCat-ID: 13623
A heuristic approach to schedule periodic real-time tasks on reconfigurable hardware
K. Danne, M. Platzner, in: Proceedings of the 15th International Conference on Field Programmable Logic and Applications (FPL), IEEE CS Press, 2005.
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2005 | Conference Paper | LibreCat-ID: 2411
Zippy – A coarse-grained reconfigurable array with support for hardware virtualization
C. Plessl, M. Platzner, in: Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP), IEEE Computer Society, 2005, pp. 213–218.
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2004 | Journal Article | LibreCat-ID: 10742
Operating systems for reconfigurable embedded platforms: online scheduling of real-time tasks
C. Steiger, H. Walder, M. Platzner, {IEEE} Transactions on Computers 53 (2004) 1393–1407.
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2004 | Conference Paper | LibreCat-ID: 13619
XF-BOARD: A Prototyping Platform for Reconfigurable Hardware Operating Systems
H. Walder, S. Nobs, M. Platzner, in: Proceedings of the 4th International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2004.
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2004 | Conference Paper | LibreCat-ID: 2415
Virtualization of Hardware – Introduction and Survey
C. Plessl, M. Platzner, in: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2004, pp. 63–69.
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2004 | Conference Paper | LibreCat-ID: 13618
A Runtime Environment for Reconfigurable Hardware Operating Systems
H. Walder, M. Platzner, in: Proceedings of the 14th International Conference on Field Programmable Logic and Applications (FPL), Springer, Berlin, Heidelberg, 2004, pp. 831–835.
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2004 | Conference Paper | LibreCat-ID: 13620
Efficient Execution of Process Networks on a Reconfigurable Hardware Virtual Machine
M. Dyer, M. Platzner, L. Thiele, in: Proceedings 12th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM), IEEE CS Press, 2004.
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2003 | Conference Paper | LibreCat-ID: 13614
Reconfigurable Hardware Operating Systems: From Design Concepts to Realizations
H. Walder, M. Platzner, in: Proceedings of the 3rd International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2003, pp. 284–287.
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2003 | Conference Paper | LibreCat-ID: 13615
Heuristics for Online Scheduling Real-Time Tasks to Partially Reconfigurable Devices
C. Steiger, H. Walder, M. Platzner, in: Proceedings of the 13th International Conference on Field Programmable Logic and Applications (FPL), Springer, Berlin, Heidelberg, 2003, pp. 575–584.
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2003 | Conference Paper | LibreCat-ID: 2418
TKDM – A Reconfigurable Co-processor in a PC's Memory Slot
C. Plessl, M. Platzner, in: Proc. Int. Conf. on Field Programmable Technology (ICFPT), IEEE Computer Society, 2003, pp. 252–259.
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2003 | Journal Article | LibreCat-ID: 2420
Instance-Specific Accelerators for Minimum Covering
C. Plessl, M. Platzner, Journal of Supercomputing 26 (2003) 109–129.
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2003 | Journal Article | LibreCat-ID: 2419
The Case for Reconfigurable Hardware in Wearable Computing
C. Plessl, R. Enzler, H. Walder, J. Beutel, M. Platzner, L. Thiele, G. Tröster, Personal and Ubiquitous Computing 7 (2003) 299–308.
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2003 | Conference Paper | LibreCat-ID: 2421
Virtualizing Hardware with Multi-Context Reconfigurable Arrays
R. Enzler, C. Plessl, M. Platzner, in: Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), Springer, 2003, pp. 151–160.
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2003 | Conference Paper | LibreCat-ID: 13612
Online scheduling for block-partitioned reconfigurable devices
H. Walder, M. Platzner, in: Proceedings Design, Automation and Test in Europe Conference (DATE), IEEE CS Press, 2003, pp. 290–295.
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2003 | Conference Paper | LibreCat-ID: 13617
Online scheduling and placement of real-time tasks to partially reconfigurable devices
C. Steiger, H. Walder, M. Platzner, L. Thiele, in: Proceedings 24th IEEE International Real-Time Systems Symposium (RTSS), IEEE CS Press, 2003, pp. 252–235.
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2003 | Conference Paper | LibreCat-ID: 2422
Co-simulation of a Hybrid Multi-Context Architecture
R. Enzler, C. Plessl, M. Platzner, in: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2003, pp. 174–180.
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2003 | Conference Paper | LibreCat-ID: 13613
Fast online task placement on FPGAs: free space partitioning and 2D-hashing
H. Walder, C. Steiger, M. Platzner, in: Proceedings International Parallel and Distributed Processing Symposium, IEEE CS Press, 2003.
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2002 | Conference Paper | LibreCat-ID: 2424
Partially Reconfigurable Cores for Xilinx Virtex
M. Dyer, C. Plessl, M. Platzner, in: Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), Springer, 2002, pp. 292–301.
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2002 | Conference Paper | LibreCat-ID: 2425
Custom Computing Machines for the Set Covering Problem
C. Plessl, M. Platzner, in: Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM), IEEE Computer Society, 2002, pp. 163–172.
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2002 | Conference Paper | LibreCat-ID: 13611
Non-preemptive Multitasking on FPGAs: Task Placement and Footprint Transform
H. Walder, M. Platzner, in: Proceedings of the 2nd International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2002, pp. 24–30.
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2002 | Journal Article | LibreCat-ID: 10651
A Framework for Run-time Reconfigurable Systems
M. Eisenring, M. Platzner, The Journal of Supercomputing 21 (2002) 145–159.
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2002 | Conference Paper | LibreCat-ID: 2423
Reconfigurable Hardware in Wearable Computing Nodes
C. Plessl, R. Enzler, H. Walder, J. Beutel, M. Platzner, L. Thiele, in: Proc. Int. Symp. on Wearable Computers (ISWC), IEEE Computer Society, 2002, pp. 215–222.
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2001 | Misc | LibreCat-ID: 13463
Dynamically Reconfigurable Processors
R. Enzler, M. Platzner, Dynamically Reconfigurable Processors, TELEMATIK, Zeitschrift des Telematik-Ingebieur-Verbandes 7(1), 2001.
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2001 | Conference Paper | LibreCat-ID: 2432
Reconfigurable Processors for Handhelds and Wearables: Application Analysis
R. Enzler, M. Platzner, C. Plessl, L. Thiele, G. Tröster, in: Reconfigurable Technology: FPGAs and Reconfigurable Processors for Computing and Communications III, 2001, pp. 135–146.
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2001 | Journal Article | LibreCat-ID: 10713
Object-oriented domain specific compilers for programming FPGAs
O. Mencer, M. Platzner, M. Morf, M. J. Flynn, {IEEE} Transactions on Very Large Scale Integration ({VLSI}) Systems 9 (2001) 205–210.
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2001 | Conference Paper | LibreCat-ID: 2428
Instance-Specific Accelerators for Minimum Covering
C. Plessl, M. Platzner, in: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2001, pp. 85–91.
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2000 | Conference Paper | LibreCat-ID: 13610
Optimization of Run-time Reconfigurable Embedded Systems
M. Eisenring, M. Platzner, in: Proceedings of the 10th International Workshop on Field Programmable Logic and Applications (FPL), Springer, 2000, pp. 565–574.
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2000 | Journal Article | LibreCat-ID: 10725
Toward embedded qualitative simulation: a specialized computer architecture for QSim
M. Platzner, B. Rinner, R. Weiss, IEEE Intelligent Systems 15 (2000) 62–68.
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2000 | Conference Paper | LibreCat-ID: 13609
An Implementation Framework for Run-time Reconfigurable Systems
M.H. Eisenring, M. Platzner, in: Proceedings of the 2nd International Workshop on Engineering of Reconfigurable Hardware/Software Objects (ENREGLE), CSREA Press, 2000, pp. 151–157.
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2000 | Journal Article | LibreCat-ID: 10606
Synthesis of Interfaces and Communication in Reconfigurable Embedded Systems
M. Eisenring, M. Platzner, IEE Proceedings -- Computers & Digital Techniques 147 (2000) 159–165.
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2000 | Journal Article | LibreCat-ID: 6507
Reconfigurable accelerators for combinatorial problems
M. Platzner, Computer 33 (2000) 58–60.
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1999 | Conference Paper | LibreCat-ID: 13607
Dynamic circuit generation for Boolean satisfiability in an object-oriented design environment
O. Mencer, M. Platzner, in: Proceedings of the 32nd Annual Hawaii International Conference on Systems Sciences (HICSS-32), IEEE CS Press, 1999.
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1999 | Conference Paper | LibreCat-ID: 13608
Communication Synthesis for Reconfigurable Embedded Systems
M. Eisenring, M. Platzner, L. Thiele, in: Proceedings of the 9th International Workshop on Field Programmable Logic and Applications (FPL), Springer, 1999, pp. 205–214.
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1998 | Journal Article | LibreCat-ID: 10608
Design and Implementation of a Parallel Constraint Satisfaction Algorithm
M. Platzner, B. Rinner, International Journal of Computers & Their Applications 5 (1998) 106–116.
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1998 | Misc | LibreCat-ID: 13464
A Distributed Computer Architecture for Fast Qualitative Simulation
M. Platzner, B. Rinner, R. Weiss, A Distributed Computer Architecture for Fast Qualitative Simulation , Texas Instruments, The Elite Yearbook 1997 - Digital Signal Processing Solutions from Europe’s leading Universities, 1998.
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1998 | Journal Article | LibreCat-ID: 10607
Reconfigurable Computer Architectures
M. Platzner, E&i Elektrotechnik Und Informationstechnik 115 (1998) 143–148.
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1998 | Conference Paper | LibreCat-ID: 13606
Acceleration of satisfiability algorithms by reconfigurable hardware
M. Platzner, G. De Micheli, in: Proceedings of the 8th International Workshop on Field Programmable Logic and Applications (FPL) , Springer , Berlin, Heidelberg, 1998, pp. 69–78.
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1997 | Journal Article | LibreCat-ID: 10609
A Computer Architecture to Support Qualitative Simulation in Industrial Applications
M. Platzner, B. Rinner, R. Weiss, E & i Elektrotechnik Und Informationstechnik 114 (1997) 13–18.
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