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427 Publications


2010 | Conference Paper | LibreCat-ID: 13641
Engineering Self-Coordinating Software Intensive Systems
W. Schäfer, M. Birattari, J. Blömer, M. Dorigo, G. Engels, R. O’Grady, M. Platzner, F.-J. Rammig, W. Reif, A. Trächtler, in: Proceedings of the Foundations of Software Engineering (FSE) and NITR & D/SPD Working Conference on the Future of Software Engineering Research (FoSER), 2010, pp. 321–324.
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2010 | Conference Paper | LibreCat-ID: 13642
A Self-Reconfigurable Lightweight Interconnect for Scalable Processor Fabrics
H. Giefers, M. Platzner, in: Proceedings of the 10th International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2010.
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2010 | Conference Paper | LibreCat-ID: 2223
Towards Adaptive Networking for Embedded Devices based on Reconfigurable Hardware
E. Lübbers, M. Platzner, C. Plessl, A. Keller, B. Plattner, in: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2010, pp. 225–231.
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2010 | Conference Paper | LibreCat-ID: 2216
Pruning the Design Space for Just-In-Time Processor Customization
M. Grad, C. Plessl, in: Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig), IEEE Computer Society, Los Alamitos, CA, USA, 2010, pp. 67–72.
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2010 | Conference Paper | LibreCat-ID: 2224
An Open Source Circuit Library with Benchmarking Facilities
M. Grad, C. Plessl, in: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2010, pp. 144–150.
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2010 | Conference Paper | LibreCat-ID: 2220
Configurable Processor Architectures: History and Trends
D. Andrews, C. Plessl, in: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2010, p. 165.
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2010 | Conference (Editor) | LibreCat-ID: 2222
Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA)
T.P. Plaks, D. Andrews, R. DeMara, H. Lam, J. Lee, C. Plessl, G. Stitt, eds., Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2010.
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2010 | Conference Paper | LibreCat-ID: 2226
Using Shared Library Interposing for Transparent Acceleration in Systems with Heterogeneous Hardware Accelerators
T. Beisel, M. Niekamp, C. Plessl, in: Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP), IEEE Computer Society, 2010, pp. 65–72.
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2010 | Conference Paper | LibreCat-ID: 2206
Reconfigurable Nodes for Future Networks
A. Keller, B. Plattner, E. Lübbers, M. Platzner, C. Plessl, in: Proc. IEEE Globecom Workshop on Network of the Future (FutureNet), IEEE, 2010, pp. 372–376.
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2010 | Conference Paper | LibreCat-ID: 2228
Performance Estimation for the Exploration of CPU-Accelerator Architectures
T. Kenter, M. Platzner, C. Plessl, M. Kauschke, in: O. Hammami, S. Larrabee (Eds.), Proc. Workshop on Architectural Research Prototyping (WARP), International Symposium on Computer Architecture (ISCA), 2010.
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2009 | Conference Paper | LibreCat-ID: 10639
Towards multi-movement hand prostheses: Combining adaptive classification with high precision sockets
A. Boschmann, P. Kaufmann, M. Platzner, M. Winkler, in: Proc. Technically Assisted Rehabilitation (TAR), 2009.
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2009 | Mastersthesis | LibreCat-ID: 10702
Evolvable Robot Controller
A. Kostin, Evolvable Robot Controller, Paderborn University, 2009.
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2009 | Journal Article | LibreCat-ID: 10703
ReconOS: Multithreaded Programming for Reconfigurable Computers
E. Lübbers, M. Platzner, ACM Transactions on Embedded Computing Systems 9 (2009) 8:1-8:33.
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2009 | Mastersthesis | LibreCat-ID: 10746
Compiler for a Custom Instruction Set CPU
M. Tofall, Compiler for a Custom Instruction Set CPU, Paderborn University, 2009.
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2009 | Mastersthesis | LibreCat-ID: 10749
Coarse-grained CGP Model using Xilinx Virtex5 DSP48E Functional Units
A. Warkentin, Coarse-Grained CGP Model Using Xilinx Virtex5 DSP48E Functional Units, Paderborn University, 2009.
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2009 | Bachelorsthesis | LibreCat-ID: 10753
Implementierung von Kryptographie-Hardwarebeschleunigern für das HW/SW-Betriebssystem ReconOS
B. Wildenhain, Implementierung von Kryptographie-Hardwarebeschleunigern Für Das HW/SW-Betriebssystem ReconOS, Paderborn University, 2009.
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2009 | Conference Paper | LibreCat-ID: 10777
Signature Self Checking (SSC): A Low-Cost Reliable Control Logic for Pipelined Microprocessors
H. Ghasemzadeh Mohammadi, S.G. Miremadi, A. Ejlali, in: Dependable Computing (PRDC), 2009 IEEE Pacific Rim International Symposium On, IEEE, 2009, pp. 252–255.
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2009 | Conference Paper | LibreCat-ID: 13632
A Multithreaded Framework for Sequential Monte Carlo Methods on CPU/FPGA Platforms
M. Happe, E. Lübbers, M. Platzner, in: Proceedings of the International Workshop on Applied Reconfigurable Computing (ARC), Springer, 2009.
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2009 | Conference Paper | LibreCat-ID: 13634
Towards Models for Many-Cores: The Case for the Reconfigurable Mesh
H. Giefers, M. Platzner, in: Proceedings of the Workshop on Many-Cores, International Conference on Architecture of Computing Systems (ARCS), 2009.
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2009 | Conference Paper | LibreCat-ID: 13635
ARMLang: A Language and Compiler for Programming Reconfigurable Mesh Many-Cores
H. Giefers, M. Platzner, in: Reconfigurable Architectures Workshop (RAW), Proceedings of the International Parallel and Distributed Processing Symposium, IEEE, 2009.
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2009 | Conference Paper | LibreCat-ID: 13636
Cooperative Multithreading in Dynamically Reconfigurable Systems
E. Lübbers, M. Platzner, in: Proceedings of the 19th International Workshop on Field Programmable Logic and Applications (FPL) , IEEE, 2009.
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2009 | Conference Paper | LibreCat-ID: 13637
Program-driven Fine-grained Power Management for the Reconfigurable Mesh
H. Giefers, M. Platzner, in: Proceedings of the 19th International Workshop on Field Programmable Logic and Applications (FPL) , IEEE, 2009.
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2009 | Conference Paper | LibreCat-ID: 13638
An adaptive Sequential Monte Carlo framework with runtime HW/SW repartitioning
M. Happe, E. Lübbers, M. Platzner, in: Proceedings of the 2009 International Conference on Field-Programmable Technology (FPT), IEEE, 2009.
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2009 | Conference Paper | LibreCat-ID: 13639
Proof-carrying Hardware: Towards Runtime Verification of Reconfigurable Modules
S. Drzevitzky, U. Kastens, M. Platzner, in: Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), IEEE, 2009.
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2009 | Conference Paper | LibreCat-ID: 2350
IMORC: Application Mapping, Monitoring and Optimization for High-Performance Reconfigurable Computing
T. Schumacher, C. Plessl, M. Platzner, in: Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM), IEEE Computer Society, 2009, pp. 275–278.
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2009 | Conference Paper | LibreCat-ID: 2262
EvoCaches: Application-specific Adaptation of Cache Mapping
P. Kaufmann, C. Plessl, M. Platzner, in: Proc. NASA/ESA Conference on Adaptive Hardware and Systems (AHS), IEEE Computer Society, Los Alamitos, CA, USA, 2009, pp. 11–18.
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2009 | Conference Paper | LibreCat-ID: 2238
Communication Performance Characterization for Reconfigurable Accelerator Design on the XD1000
T. Schumacher, T. Süß, C. Plessl, M. Platzner, in: Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig), IEEE Computer Society, Los Alamitos, CA, USA, 2009, pp. 119–124.
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2009 | Conference Paper | LibreCat-ID: 2261
An Accelerator for k-th Nearest Neighbor Thinning Based on the IMORC Infrastructure
T. Schumacher, C. Plessl, M. Platzner, in: Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), IEEE, 2009, pp. 338–344.
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2009 | Conference Paper | LibreCat-ID: 2263
Woolcano: An Architecture and Tool Flow for Dynamic Instruction Set Extension on Xilinx Virtex-4 FX
M. Grad, C. Plessl, in: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, USA, 2009, pp. 319–322.
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2008 | Conference Paper | LibreCat-ID: 2358
A method for OSEM PET reconstruction on parallel architectures using STIR
T. Beisel, S. Lietsch, K. Thielemans, in: IEEE Nuclear Science Symposium Conference Record (NSS), IEEE, 2008, pp. 4161–4168.
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2008 | Conference Paper | LibreCat-ID: 2365
The GOmputer: Accelerating GO with FPGAs
M. Platzner, S. Döhre, M. Happe, T. Kenter, U. Lorenz, T. Schumacher, A. Send, A. Warkentin, in: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2008, pp. 245–251.
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2008 | Bachelorsthesis | LibreCat-ID: 10628
Aufbau und experimentelle Bewertung eines Systems zur Langzeitklassifikation von EMG-Signalen
A. Boschmann, Aufbau Und Experimentelle Bewertung Eines Systems Zur Langzeitklassifikation von EMG-Signalen, Paderborn University, 2008.
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2008 | Bachelorsthesis | LibreCat-ID: 10641
Selbstoptimierender Cache-Kontroller
D. Breitlauch, Selbstoptimierender Cache-Kontroller, Paderborn University, 2008.
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2008 | Bachelorsthesis | LibreCat-ID: 10644
Verteilte Simulation von mobilen Robotern mit EyeSim
T. Ceylan, C. Yalcin, Verteilte Simulation von Mobilen Robotern Mit EyeSim, Paderborn University, 2008.
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2008 | Conference Paper | LibreCat-ID: 10653
Comparing Evolvable Hardware to Conventional Classifiers for Electromyographic Prosthetic Hand Control
K. Glette, T. Gruber, P. Kaufmann, J. Torresen, B. Sick, M. Platzner, in: IEEE Adaptive Hardware and Systems (AHS), IEEE, 2008, pp. 32–39.
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2008 | Conference Paper | LibreCat-ID: 10656
A Comparison of Evolvable Hardware Architectures for Classification Tasks
K. Glette, J. Torresen, P. Kaufmann, M. Platzner, in: IEEE Intl. Conf. on Evolvable Systems (ICES), Springer, 2008, pp. 22–33.
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2008 | Mastersthesis | LibreCat-ID: 10669
Parallelisierung und Hardware- / Software - Codesign von Partikelfiltern
M. Happe, Parallelisierung Und Hardware- / Software - Codesign von Partikelfiltern, Paderborn University, 2008.
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2008 | Preprint | LibreCat-ID: 10690
Evolvable Hardware - Tutorial at Architecture of Computing Systems (ARCS)
J. Torresen, K. Glette, M. Platzner, P. Kaufmann, (2008).
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2008 | Conference Paper | LibreCat-ID: 10691
Advanced Techniques for the Creation and Propagation of Modules in Cartesian Genetic Programming
P. Kaufmann, M. Platzner, in: Genetic and Evolutionary Computation (GECCO), ACM Press, 2008, pp. 1219–1226.
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2008 | Bachelorsthesis | LibreCat-ID: 10696
Implementierung und Bewertung des multikriteriellen Optimierungsverfahrens IBEA für den automatisierten Schaltungsentwurf
T. Knieper, Implementierung Und Bewertung Des Multikriteriellen Optimierungsverfahrens IBEA Für Den Automatisierten Schaltungsentwurf, Paderborn University, 2008.
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2008 | Conference Paper | LibreCat-ID: 10698
On Robust Evolution of Digital Hardware
T. Knieper, B. Defo, P. Kaufmann, M. Platzner, in: Biologically Inspired Collaborative Computing (BICC), Springer, 2008, pp. 2313–222.
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2008 | Bachelorsthesis | LibreCat-ID: 10718
Eine Monitoring- und Debugging-Infrastruktur für hybride HW/SW-Systeme
J. Niklas, Eine Monitoring- Und Debugging-Infrastruktur Für Hybride HW/SW-Systeme, Paderborn University, 2008.
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2008 | Bachelorsthesis | LibreCat-ID: 10721
Raytracing on a Custom Instruction Set CPU
M. Östermann, Raytracing on a Custom Instruction Set CPU, Paderborn University, 2008.
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2008 | Bachelorsthesis | LibreCat-ID: 10751
Design and Evaluation of MicroBlaze Multi-core Architectures
N. Westerheide, Design and Evaluation of MicroBlaze Multi-Core Architectures, Paderborn University, 2008.
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2008 | Conference Paper | LibreCat-ID: 10778
A cost-effective error detection and roll-back recovery technique for embedded microprocessor control logic
H. Ghasemzadeh Mohammadi, H. Tabkhi, S.G. Miremadi, A. Ejlali, in: 2008 International Conference on Microelectronics, IEEE, 2008, pp. 444–447.
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2008 | Conference Paper | LibreCat-ID: 13629
Realizing Reconfigurable Mesh Algorithms on Softcore Arrays
H. Giefers, M. Platzner, in: Proceedings of the International Symposium on Systems, Architectures, Modeling and Simulation (SAMOS), IEEE, 2008.
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2008 | Conference Paper | LibreCat-ID: 13630
Communication and Synchronization in Multithreaded Reconfigurable Computing Systems
E. Lübbers, M. Platzner, in: Proceedings of the 8th International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2008.
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2008 | Conference Paper | LibreCat-ID: 13631
A portable abstraction layer for hardware threads
E. Lübbers, M. Platzner, in: Proceedings of the 18th International Conference on Field Programmable Logic and Applications (FPL), IEEE, 2008.
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2008 | Conference Paper | LibreCat-ID: 2364
A Hardware Accelerator for k-th Nearest Neighbor Thinning
T. Schumacher, R. Meiche, P. Kaufmann, E. Lübbers, C. Plessl, M. Platzner, in: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2008, pp. 245–251.
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2008 | Conference Paper | LibreCat-ID: 2372
IMORC: An infrastructure for performance monitoring and optimization of reconfigurable computers
T. Schumacher, C. Plessl, M. Platzner, in: Many-Core and Reconfigurable Supercomputing Conference (MRSC), 2008.
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