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427 Publications
2008 | Conference Paper | LibreCat-ID: 10698
Knieper, T., Defo, B., Kaufmann, P., & Platzner, M. (2008). On Robust Evolution of Digital Hardware. In Biologically Inspired Collaborative Computing (BICC) (Vol. 268, pp. 2313–222). Springer.
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2008 | Bachelorsthesis | LibreCat-ID: 10718
Niklas, J. (2008). Eine Monitoring- und Debugging-Infrastruktur für hybride HW/SW-Systeme. Paderborn University.
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2008 | Bachelorsthesis | LibreCat-ID: 10721
Östermann, M. (2008). Raytracing on a Custom Instruction Set CPU. Paderborn University.
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2008 | Bachelorsthesis | LibreCat-ID: 10751
Westerheide, N. (2008). Design and Evaluation of MicroBlaze Multi-core Architectures. Paderborn University.
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2008 | Conference Paper | LibreCat-ID: 10778
Ghasemzadeh Mohammadi, H., Tabkhi, H., Miremadi, S. G., & Ejlali, A. (2008). A cost-effective error detection and roll-back recovery technique for embedded microprocessor control logic. In 2008 International Conference on Microelectronics (pp. 444–447). IEEE. https://doi.org/10.1109/ICM.2008.5393497
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2008 | Conference Paper | LibreCat-ID: 13629
Giefers, H., & Platzner, M. (2008). Realizing Reconfigurable Mesh Algorithms on Softcore Arrays. In Proceedings of the International Symposium on Systems, Architectures, Modeling and Simulation (SAMOS). IEEE.
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2008 | Conference Paper | LibreCat-ID: 13630
Lübbers, E., & Platzner, M. (2008). Communication and Synchronization in Multithreaded Reconfigurable Computing Systems. In Proceedings of the 8th International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA). CSREA Press.
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2008 | Conference Paper | LibreCat-ID: 13631
Lübbers, E., & Platzner, M. (2008). A portable abstraction layer for hardware threads. In Proceedings of the 18th International Conference on Field Programmable Logic and Applications (FPL). IEEE. https://doi.org/10.1109/fpl.2008.4629901
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2008 | Conference Paper | LibreCat-ID: 2364
Schumacher, T., Meiche, R., Kaufmann, P., Lübbers, E., Plessl, C., & Platzner, M. (2008). A Hardware Accelerator for k-th Nearest Neighbor Thinning. Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 245–251.
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2008 | Conference Paper | LibreCat-ID: 2372
Schumacher, T., Plessl, C., & Platzner, M. (2008). IMORC: An infrastructure for performance monitoring and optimization of reconfigurable computers. Many-Core and Reconfigurable Supercomputing Conference (MRSC).
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2007 | Conference Paper | LibreCat-ID: 6508
Kaufmann, P., & Platzner, M. (2007). MOVES: A Modular Framework for Hardware Evolution. In Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007) (pp. 447–454). Edinburgh, UK: IEEE. https://doi.org/10.1109/ahs.2007.73
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| DOI
2007 | Mastersthesis | LibreCat-ID: 10623
Beisel, T. (2007). Entwurf und Evaluation eines parallelen Verfahrens zur Bildrekonstruktion in der Positronen-Emissions-Tomographie auf Multi-Core-Architekturen. Paderborn University.
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2007 | Journal Article | LibreCat-ID: 10625
Bergmann, N., Platzner, M., & Teich, J. (2007). Dynamically Reconfigurable Architectures (editorial). {EURASIP} Journal on Embedded Systems, 2007, 1–2. https://doi.org/10.1155/2007/28405
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| DOI
2007 | Bachelorsthesis | LibreCat-ID: 10643
Ceylan, T., & Yalcin, C. (2007). Distributed Simulation of mobile Robots using EyeSim. Paderborn University.
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2007 | Journal Article | LibreCat-ID: 10646
Danne, K., Mühlenbernd, R., & Platzner, M. (2007). Server-based execution of periodic tasks on dynamically reconfigurable hardware. IET Computers Digital Techniques, 1(4), 295–302. https://doi.org/10.1049/iet-cdt:20060186
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| DOI
2007 | Mastersthesis | LibreCat-ID: 10647
Defo, B. (2007). A Comparison of Multi-Objective Evolutionary Algorithms for Automated Circuit Design and Optimization. Paderborn University.
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2007 | Mastersthesis | LibreCat-ID: 10648
Döhre, S. (2007). Entwurf und Implementierung einer RocketIO-basierten Kommunikationsschnittstelle für Multi-FPGA Systeme. Paderborn University.
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2007 | Conference Paper | LibreCat-ID: 10689
Kaufmann, P., & Platzner, M. (2007). Toward Self-adaptive Embedded Systems: Multi-objective Hardware Evolution. In Architecture of Computing Systems (ARCS) (Vol. 4415, pp. 199–208). Springer.
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2007 | Bachelorsthesis | LibreCat-ID: 10709
Meiche, R. (2007). VHDL-Implementierung eines Clustering-Verfahrens für multikriterielle Optimierungsalgorithmen. Paderborn University.
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2007 | Mastersthesis | LibreCat-ID: 10728
Reisch, W. (2007). Bildverarbeitungs-Architekturen und -Bibliotheken für das rekonfigurierbare Betriebssystem ReconOS. Paderborn University.
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2007 | Mastersthesis | LibreCat-ID: 10729
Rethmeier, E. (2007). Konzeption und Implementierung einer Microsoft Windows CE 5.0 Plattform für ein ARM-basiertes eingebettetes Rechnersystem. Paderborn University.
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2007 | Conference Paper | LibreCat-ID: 10735
Schumacher, T., Lübbers, E., Kaufmann, P., & Platzner, M. (2007). Accelerating the Cube Cut Problem with an FPGA-Augmented Compute Cluster. In Proceedings of the ParaFPGA Symposium, International Conference on Parallel Computing: Architectures, Algorithms and Applications (PARCO) (Vol. 15, pp. 749–756). IOS Press.
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2007 | Conference Paper | LibreCat-ID: 13627
Giefers, H., & Platzner, M. (2007). A Many-Core Implementation Based on the Reconfigurable Mesh Model. In Proceedings of the 17th International Conference on Field Programmable Logic and Applications (FPL). IEEE. https://doi.org/10.1109/fpl.2007.4380623
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| DOI
2007 | Conference Paper | LibreCat-ID: 13628
Lübbers, E., & Platzner, M. (2007). ReconOS: An RTOS Supporting Hard-and Software Threads. In Proceedings of the 17th International Conference on Field Programmable Logic and Applications (FPL). IEEE. https://doi.org/10.1109/fpl.2007.4380686
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2006 | Conference Paper | LibreCat-ID: 2401
Plessl, C., Platzner, M., & Thiele, L. (2006). Optimal Temporal Partitioning based on Slowdown and Retiming. In Proc. Int. Conf. on Field Programmable Technology (ICFPT) (pp. 345–348). IEEE Computer Society. https://doi.org/10.1109/FPT.2006.270344
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| DOI
2006 | Conference Paper | LibreCat-ID: 10688
Kaufmann, P., & Platzner, M. (2006). Multi-objective Intrinsic Hardware Evolution. In Intl. Conf. Military Applications of Programmable Logic Devices (MAPLD).
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2006 | Bachelorsthesis | LibreCat-ID: 10716
Mühlenbernd, R. (2006). FPGA-Implementierung eines server-basierten Schedulers für periodische Hardwaretasks. Paderborn University.
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2006 | Conference Paper | LibreCat-ID: 13624
Danne, K., Mühlenbernd, R., & Platzner, M. (2006). Executing Hardware Tasks on Dynamically Reconfigurable Devices under Real-time Conditions. In Proceedings of the 16th International Conference on Field Programmable Logic and Applications (FPL). IEEE.
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2006 | Conference Paper | LibreCat-ID: 13625
Danne, K., & Platzner, M. (2006). An EDF Schedulability Test for Periodic Tasks on Reconfigurable Hardware Devices. In In ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES).
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2006 | Conference Paper | LibreCat-ID: 13626
Danne, K., & Platzner, M. (2006). Partitioned Scheduling of Periodic Real-time Tasks onto Reconfigurable Hardware. In Proceedings of the 13th Reconfigurable Architectures Workshop (RAW). IEEE CS Press.
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2005 | Conference Paper | LibreCat-ID: 2411
Plessl, C., & Platzner, M. (2005). Zippy – A coarse-grained reconfigurable array with support for hardware virtualization. In Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP) (pp. 213–218). IEEE Computer Society. https://doi.org/10.1109/ASAP.2005.69
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2005 | Journal Article | LibreCat-ID: 2412
Enzler, R., Plessl, C., & Platzner, M. (2005). System-level performance evaluation of reconfigurable processors. Microprocessors and Microsystems, 29(2–3), 63–73. https://doi.org/10.1016/j.micpro.2004.06.004
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| DOI
2005 | Conference Paper | LibreCat-ID: 13621
Danne, K., & Platzner, M. (2005). Periodic real-time scheduling for FPGA computers. In Proceedings of the Third International Workshop on Intelligent Solutions in Embedded Systems (WISES). https://doi.org/10.1109/wises.2005.1438720
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| DOI
2005 | Conference Paper | LibreCat-ID: 13622
Danne, K., & Platzner, M. (2005). Memory-demanding Periodic Real-time Applications on FPGA Computers. In Work-in-Progress Proceedings of the 17th Euromicro Conference on Real-time Systems (ECRTS).
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2005 | Conference Paper | LibreCat-ID: 13623
Danne, K., & Platzner, M. (2005). A heuristic approach to schedule periodic real-time tasks on reconfigurable hardware. In Proceedings of the 15th International Conference on Field Programmable Logic and Applications (FPL). IEEE CS Press. https://doi.org/10.1109/fpl.2005.1515787
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| DOI
2004 | Conference Paper | LibreCat-ID: 2415
Plessl, C., & Platzner, M. (2004). Virtualization of Hardware – Introduction and Survey. In Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA) (pp. 63–69). CSREA Press.
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2004 | Journal Article | LibreCat-ID: 10742
Steiger, C., Walder, H., & Platzner, M. (2004). Operating systems for reconfigurable embedded platforms: online scheduling of real-time tasks. {IEEE} Transactions on Computers, 53(11), 1393–1407. https://doi.org/10.1109/tc.2004.99
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2004 | Conference Paper | LibreCat-ID: 13618
Walder, H., & Platzner, M. (2004). A Runtime Environment for Reconfigurable Hardware Operating Systems. In Proceedings of the 14th International Conference on Field Programmable Logic and Applications (FPL) (pp. 831–835). Berlin, Heidelberg: Springer. https://doi.org/10.1007/978-3-540-30117-2_84
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2004 | Conference Paper | LibreCat-ID: 13619
Walder, H., Nobs, S., & Platzner, M. (2004). XF-BOARD: A Prototyping Platform for Reconfigurable Hardware Operating Systems. In Proceedings of the 4th International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA). CSREA Press.
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2004 | Conference Paper | LibreCat-ID: 13620
Dyer, M., Platzner, M., & Thiele, L. (2004). Efficient Execution of Process Networks on a Reconfigurable Hardware Virtual Machine. In Proceedings 12th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM). IEEE CS Press. https://doi.org/10.1109/fccm.2004.31
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2003 | Conference Paper | LibreCat-ID: 2418
Plessl, C., & Platzner, M. (2003). TKDM – A Reconfigurable Co-processor in a PC’s Memory Slot. In Proc. Int. Conf. on Field Programmable Technology (ICFPT) (pp. 252–259). IEEE Computer Society. https://doi.org/10.1109/FPT.2003.1275755
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2003 | Journal Article | LibreCat-ID: 2419
Plessl, C., Enzler, R., Walder, H., Beutel, J., Platzner, M., Thiele, L., & Tröster, G. (2003). The Case for Reconfigurable Hardware in Wearable Computing. Personal and Ubiquitous Computing, 7(5), 299–308. https://doi.org/10.1007/s00779-003-0243-x
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| DOI
2003 | Journal Article | LibreCat-ID: 2420
Plessl, C., & Platzner, M. (2003). Instance-Specific Accelerators for Minimum Covering. Journal of Supercomputing, 26(2), 109–129. https://doi.org/10.1023/a:1024443416592
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2003 | Conference Paper | LibreCat-ID: 2421
Enzler, R., Plessl, C., & Platzner, M. (2003). Virtualizing Hardware with Multi-Context Reconfigurable Arrays. In Proc. Int. Conf. on Field Programmable Logic and Applications (FPL) (Vol. 2778, pp. 151–160). Springer. https://doi.org/10.1007/b12007
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2003 | Conference Paper | LibreCat-ID: 2422
Enzler, R., Plessl, C., & Platzner, M. (2003). Co-simulation of a Hybrid Multi-Context Architecture. In Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA) (pp. 174–180). CSREA Press.
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2003 | Conference Paper | LibreCat-ID: 13612
Walder, H., & Platzner, M. (2003). Online scheduling for block-partitioned reconfigurable devices. In Proceedings Design, Automation and Test in Europe Conference (DATE) (pp. 290–295). IEEE CS Press. https://doi.org/10.1109/date.2003.1253622
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2003 | Conference Paper | LibreCat-ID: 13613
Walder, H., Steiger, C., & Platzner, M. (2003). Fast online task placement on FPGAs: free space partitioning and 2D-hashing. In Proceedings International Parallel and Distributed Processing Symposium. IEEE CS Press. https://doi.org/10.1109/ipdps.2003.1213329
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| DOI
2003 | Conference Paper | LibreCat-ID: 13614
Walder, H., & Platzner, M. (2003). Reconfigurable Hardware Operating Systems: From Design Concepts to Realizations. In Proceedings of the 3rd International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA) (pp. 284–287). CSREA Press.
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2003 | Conference Paper | LibreCat-ID: 13615
Steiger, C., Walder, H., & Platzner, M. (2003). Heuristics for Online Scheduling Real-Time Tasks to Partially Reconfigurable Devices. In Proceedings of the 13th International Conference on Field Programmable Logic and Applications (FPL) (pp. 575–584). Berlin, Heidelberg: Springer. https://doi.org/10.1007/978-3-540-45234-8_56
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2003 | Conference Paper | LibreCat-ID: 13617
Steiger, C., Walder, H., Platzner, M., & Thiele, L. (2003). Online scheduling and placement of real-time tasks to partially reconfigurable devices. In Proceedings 24th IEEE International Real-Time Systems Symposium (RTSS) (pp. 252–235). IEEE CS Press. https://doi.org/10.1109/real.2003.1253269
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