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18 Publications
2019 | Mastersthesis | LibreCat-ID: 15874
Implementing a Real-time System on a Platform FPGA operated with ReconOS
C. Lienen, Implementing a Real-Time System on a Platform FPGA Operated with ReconOS, Universität Paderborn, 2019.
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C. Lienen, Implementing a Real-Time System on a Platform FPGA Operated with ReconOS, Universität Paderborn, 2019.
2019 | Mastersthesis | LibreCat-ID: 15920
A Bitstream-Level Proof-Carrying Hardware Technique for Information Flow Tracking
M. Keerthipati, A Bitstream-Level Proof-Carrying Hardware Technique for Information Flow Tracking, Universität Paderborn, 2019.
LibreCat
M. Keerthipati, A Bitstream-Level Proof-Carrying Hardware Technique for Information Flow Tracking, Universität Paderborn, 2019.
2019 | Mastersthesis | LibreCat-ID: 14831
FPGA Acceleration of String Search Techniques in Huge Data Sets
N.S. Sabu, FPGA Acceleration of String Search Techniques in Huge Data Sets, Paderborn University, 2019.
LibreCat
N.S. Sabu, FPGA Acceleration of String Search Techniques in Huge Data Sets, Paderborn University, 2019.
2019 | Mastersthesis | LibreCat-ID: 14546
Autonomous Operation of High-Performance Compute Nodes through Self-Awareness and Learning Classifiers
T. Hansmeier, Autonomous Operation of High-Performance Compute Nodes through Self-Awareness and Learning Classifiers, Universität Paderborn, 2019.
LibreCat
T. Hansmeier, Autonomous Operation of High-Performance Compute Nodes through Self-Awareness and Learning Classifiers, Universität Paderborn, 2019.
2018 | Dissertation | LibreCat-ID: 3720
FPGA-based Reconfigurable Cache Mapping Schemes: Design and Optimization
N. Ho, FPGA-Based Reconfigurable Cache Mapping Schemes: Design and Optimization, Universität Paderborn, 2018.
LibreCat
| DOI
N. Ho, FPGA-Based Reconfigurable Cache Mapping Schemes: Design and Optimization, Universität Paderborn, 2018.
2018 | Bachelorsthesis | LibreCat-ID: 3365
Static Scheduling Algorithms for Heterogeneous Compute Nodes
J.-P. Schnuer, Static Scheduling Algorithms for Heterogeneous Compute Nodes, Universität Paderborn, 2018.
LibreCat
J.-P. Schnuer, Static Scheduling Algorithms for Heterogeneous Compute Nodes, Universität Paderborn, 2018.
2018 | Bachelorsthesis | LibreCat-ID: 3366
Evaluation of OpenCL-based Compilation for FPGAs
M. Croce, Evaluation of OpenCL-Based Compilation for FPGAs, Universität Paderborn, 2018.
LibreCat
M. Croce, Evaluation of OpenCL-Based Compilation for FPGAs, Universität Paderborn, 2018.
2017 | Bachelorsthesis | LibreCat-ID: 3580
An FPGA Accelerator for Checking Resolution Proofs
T. Hansmeier, An FPGA Accelerator for Checking Resolution Proofs, Universität Paderborn, 2017.
LibreCat
T. Hansmeier, An FPGA Accelerator for Checking Resolution Proofs, Universität Paderborn, 2017.
2017 | Mastersthesis | LibreCat-ID: 74
OpenCL-basierte Videoverarbeitung auf heterogenen Rechenknoten
C. Knorr, OpenCL-basierte Videoverarbeitung auf heterogenen Rechenknoten, Universität Paderborn, 2017.
LibreCat
C. Knorr, OpenCL-basierte Videoverarbeitung auf heterogenen Rechenknoten, Universität Paderborn, 2017.
2017 | Mastersthesis | LibreCat-ID: 1157
A Framework for the Synthesis of Approximate Circuits
L.M. Witschen, A Framework for the Synthesis of Approximate Circuits, Universität Paderborn, 2017.
LibreCat
L.M. Witschen, A Framework for the Synthesis of Approximate Circuits, Universität Paderborn, 2017.
2015 | Bachelorsthesis | LibreCat-ID: 3364
Evaluation von Bildverarbeitungsalgorithmen in heterogenen Rechenknoten
C. Knorr, Evaluation von Bildverarbeitungsalgorithmen in heterogenen Rechenknoten, Universität Paderborn, 2015.
LibreCat
C. Knorr, Evaluation von Bildverarbeitungsalgorithmen in heterogenen Rechenknoten, Universität Paderborn, 2015.
2014 | Mastersthesis | LibreCat-ID: 10701
Hardware Acceleration of Mechatronic Controllers on a Zynq Platform FPGA
B. Koch, Hardware Acceleration of Mechatronic Controllers on a Zynq Platform FPGA, Paderborn University, 2014.
LibreCat
B. Koch, Hardware Acceleration of Mechatronic Controllers on a Zynq Platform FPGA, Paderborn University, 2014.
2014 | Mastersthesis | LibreCat-ID: 10744
Multithreaded Parallelization of Mechatronic Controllers on a Zynq Platform FPGA
S. Surmund, Multithreaded Parallelization of Mechatronic Controllers on a Zynq Platform FPGA, Paderborn University, 2014.
LibreCat
S. Surmund, Multithreaded Parallelization of Mechatronic Controllers on a Zynq Platform FPGA, Paderborn University, 2014.
2014 | Dissertation | LibreCat-ID: 10733
Parallel Monte-Carlo Tree Search for HPC Systems and its Application to Computer Go
L. Schäfers, Parallel Monte-Carlo Tree Search for HPC Systems and Its Application to Computer Go, Logos Verlag Berlin GmbH, Berlin, 2014.
LibreCat
L. Schäfers, Parallel Monte-Carlo Tree Search for HPC Systems and Its Application to Computer Go, Logos Verlag Berlin GmbH, Berlin, 2014.
2013 | Dissertation | LibreCat-ID: 11619
Adapting Hardware Systems by Means of Multi-Objective Evolution
P. Kaufmann, Adapting Hardware Systems by Means of Multi-Objective Evolution, Logos Verlag Berlin GmbH, Berlin, 2013.
LibreCat
P. Kaufmann, Adapting Hardware Systems by Means of Multi-Objective Evolution, Logos Verlag Berlin GmbH, Berlin, 2013.
2013 | Dissertation | LibreCat-ID: 501
Performance and thermal management on self-adaptive hybrid multi-cores
M. Happe, Performance and Thermal Management on Self-Adaptive Hybrid Multi-Cores, Logos Verlag Berlin GmbH, Berlin, 2013.
LibreCat
| Files available
M. Happe, Performance and Thermal Management on Self-Adaptive Hybrid Multi-Cores, Logos Verlag Berlin GmbH, Berlin, 2013.
2012 | Dissertation | LibreCat-ID: 586
Proof-Carrying Hardware: A Novel Approach to Reconfigurable Hardware Security
S. Drzevitzky, Proof-Carrying Hardware: A Novel Approach to Reconfigurable Hardware Security, Universität Paderborn, 2012.
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S. Drzevitzky, Proof-Carrying Hardware: A Novel Approach to Reconfigurable Hardware Security, Universität Paderborn, 2012.
2012 | Dissertation | LibreCat-ID: 10652
Design and Programming of Reconfigurable Mesh based Many-Cores
H. Giefers, Design and Programming of Reconfigurable Mesh Based Many-Cores, Logos Verlag Berlin GmbH, Berlin, 2012.
LibreCat
H. Giefers, Design and Programming of Reconfigurable Mesh Based Many-Cores, Logos Verlag Berlin GmbH, Berlin, 2012.