Marco Platzner

Technische Informatik
marco.platzner@uni-paderborn.de
ID
398

243 Publications

Mark all

[243]
2003 | Conference Paper | LibreCat-ID: 2422
R. Enzler, C. Plessl, and M. Platzner, “Co-simulation of a Hybrid Multi-Context Architecture,” in Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 2003, pp. 174–180.
LibreCat
 
[242]
2003 | Conference Paper | LibreCat-ID: 13612
H. Walder and M. Platzner, “Online scheduling for block-partitioned reconfigurable devices,” in Proceedings Design, Automation and Test in Europe Conference (DATE), 2003, pp. 290–295.
LibreCat | DOI
 
[241]
2003 | Conference Paper | LibreCat-ID: 13613
H. Walder, C. Steiger, and M. Platzner, “Fast online task placement on FPGAs: free space partitioning and 2D-hashing,” in Proceedings International Parallel and Distributed Processing Symposium, 2003.
LibreCat | DOI
 
[240]
2003 | Conference Paper | LibreCat-ID: 13614
H. Walder and M. Platzner, “Reconfigurable Hardware Operating Systems: From Design Concepts to Realizations,” in Proceedings of the 3rd International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA), 2003, pp. 284–287.
LibreCat
 
[239]
2003 | Conference Paper | LibreCat-ID: 13615
C. Steiger, H. Walder, and M. Platzner, “Heuristics for Online Scheduling Real-Time Tasks to Partially Reconfigurable Devices,” in Proceedings of the 13th International Conference on Field Programmable Logic and Applications (FPL), 2003, pp. 575–584.
LibreCat | DOI
 
[238]
2003 | Conference Paper | LibreCat-ID: 13617
C. Steiger, H. Walder, M. Platzner, and L. Thiele, “Online scheduling and placement of real-time tasks to partially reconfigurable devices,” in Proceedings 24th IEEE International Real-Time Systems Symposium (RTSS), 2003, pp. 252–235.
LibreCat | DOI
 
[237]
2002 | Conference Paper | LibreCat-ID: 2423
C. Plessl, R. Enzler, H. Walder, J. Beutel, M. Platzner, and L. Thiele, “Reconfigurable Hardware in Wearable Computing Nodes,” in Proc. Int. Symp. on Wearable Computers (ISWC), 2002, pp. 215–222.
LibreCat | DOI
 
[236]
2002 | Conference Paper | LibreCat-ID: 2424
M. Dyer, C. Plessl, and M. Platzner, “Partially Reconfigurable Cores for Xilinx Virtex,” in Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), 2002, vol. 2438, pp. 292–301.
LibreCat | DOI
 
[235]
2002 | Conference Paper | LibreCat-ID: 2425
C. Plessl and M. Platzner, “Custom Computing Machines for the Set Covering Problem,” in Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM), 2002, pp. 163–172.
LibreCat | DOI
 
[234]
2002 | Journal Article | LibreCat-ID: 10651
M. Eisenring and M. Platzner, “A Framework for Run-time Reconfigurable Systems,” The Journal of Supercomputing, vol. 21, no. 2, pp. 145–159, 2002.
LibreCat | DOI
 
[233]
2002 | Conference Paper | LibreCat-ID: 13611
H. Walder and M. Platzner, “Non-preemptive Multitasking on FPGAs: Task Placement and Footprint Transform,” in Proceedings of the 2nd International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA), 2002, pp. 24–30.
LibreCat
 
[232]
2001 | Conference Paper | LibreCat-ID: 2428
C. Plessl and M. Platzner, “Instance-Specific Accelerators for Minimum Covering,” in Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 2001, pp. 85–91.
LibreCat
 
[231]
2001 | Conference Paper | LibreCat-ID: 2432
R. Enzler, M. Platzner, C. Plessl, L. Thiele, and G. Tröster, “Reconfigurable Processors for Handhelds and Wearables: Application Analysis,” in Reconfigurable Technology: FPGAs and Reconfigurable Processors for Computing and Communications III, 2001, vol. 4525, pp. 135–146.
LibreCat | DOI
 
[230]
2001 | Journal Article | LibreCat-ID: 10713
O. Mencer, M. Platzner, M. Morf, and M. J. Flynn, “Object-oriented domain specific compilers for programming FPGAs,” {IEEE} Transactions on Very Large Scale Integration ({VLSI}) Systems, vol. 9, no. 1, pp. 205–210, 2001.
LibreCat | DOI
 
[229]
2001 | Misc | LibreCat-ID: 13463
R. Enzler and M. Platzner, Dynamically Reconfigurable Processors. TELEMATIK, Zeitschrift des Telematik-Ingebieur-Verbandes 7(1), 2001.
LibreCat
 
[228]
2000 | Journal Article | LibreCat-ID: 6507
M. Platzner, “Reconfigurable accelerators for combinatorial problems,” Computer, vol. 33, no. 4, pp. 58–60, 2000.
LibreCat | DOI
 
[227]
2000 | Journal Article | LibreCat-ID: 10606
M. Eisenring and M. Platzner, “Synthesis of Interfaces and Communication in Reconfigurable Embedded Systems,” IEE Proceedings -- Computers & Digital Techniques, vol. 147, pp. 159–165, 2000.
LibreCat | DOI
 
[226]
2000 | Journal Article | LibreCat-ID: 10725
M. Platzner, B. Rinner, and R. Weiss, “Toward embedded qualitative simulation: a specialized computer architecture for QSim,” IEEE Intelligent Systems, vol. 15, no. 2, pp. 62–68, 2000.
LibreCat | DOI
 
[225]
2000 | Conference Paper | LibreCat-ID: 13609
M. H. Eisenring and M. Platzner, “An Implementation Framework for Run-time Reconfigurable Systems,” in Proceedings of the 2nd International Workshop on Engineering of Reconfigurable Hardware/Software Objects (ENREGLE), 2000, pp. 151–157.
LibreCat
 
[224]
2000 | Conference Paper | LibreCat-ID: 13610
M. Eisenring and M. Platzner, “Optimization of Run-time Reconfigurable Embedded Systems,” in Proceedings of the 10th International Workshop on Field Programmable Logic and Applications (FPL), 2000, pp. 565–574.
LibreCat
 
[223]
1999 | Conference Paper | LibreCat-ID: 13607
O. Mencer and M. Platzner, “Dynamic circuit generation for Boolean satisfiability in an object-oriented design environment,” in Proceedings of the 32nd Annual Hawaii International Conference on Systems Sciences (HICSS-32), 1999.
LibreCat | DOI
 
[222]
1999 | Conference Paper | LibreCat-ID: 13608
M. Eisenring, M. Platzner, and L. Thiele, “Communication Synthesis for Reconfigurable Embedded Systems,” in Proceedings of the 9th International Workshop on Field Programmable Logic and Applications (FPL), 1999, vol. 1673, pp. 205–214.
LibreCat | DOI
 
[221]
1998 | Journal Article | LibreCat-ID: 10607
M. Platzner, “Reconfigurable Computer Architectures,” e&i Elektrotechnik und Informationstechnik, vol. 115, pp. 143–148, 1998.
LibreCat
 
[220]
1998 | Journal Article | LibreCat-ID: 10608
M. Platzner and B. Rinner, “Design and Implementation of a Parallel Constraint Satisfaction Algorithm,” International Journal of Computers & Their Applications, vol. 5, pp. 106–116, 1998.
LibreCat
 
[219]
1998 | Misc | LibreCat-ID: 13464
M. Platzner, B. Rinner, and R. Weiss, A Distributed Computer Architecture for Fast Qualitative Simulation . Texas Instruments, The Elite Yearbook 1997 - Digital Signal Processing Solutions from Europe’s leading Universities, 1998, pp. 106–107.
LibreCat
 
[218]
1998 | Conference Paper | LibreCat-ID: 13606
M. Platzner and G. De Micheli, “Acceleration of satisfiability algorithms by reconfigurable hardware,” in Proceedings of the 8th International Workshop on Field Programmable Logic and Applications (FPL) , 1998, pp. 69–78.
LibreCat | DOI
 
[217]
1997 | Journal Article | LibreCat-ID: 10609
M. Platzner, B. Rinner, and R. Weiss, “A Computer Architecture to Support Qualitative Simulation in Industrial Applications,” e & i Elektrotechnik und Informationstechnik, vol. 114, pp. 13–18, 1997.
LibreCat
 
[216]
1997 | Journal Article | LibreCat-ID: 10724
M. Platzner, B. Rinner, and R. Weiss, “Parallel qualitative simulation,” Simulation Practice and Theory, vol. 5, no. 7–8, pp. 623–638, 1997.
LibreCat | DOI
 
[215]
1997 | Conference Paper | LibreCat-ID: 13603
M. Platzner and L. Peters, “Fast Signature Segmentation on a Multi-DSP Architecture,” in Proceedings of the SPIE: Conference on Parallel and Distributed Methods for Image Processing, 1997, vol. 3166.
LibreCat
 
[214]
1997 | Conference Paper | LibreCat-ID: 13604
T. Röwekamp, M. Platzner, and L. Peters, “Specialized Architectures for Optical Flow Computation: A Performance Comparison of ASIC, DSP, and Multi-DSP,” in Proceedings of the 8th International Conference on Signal Processing Applications & Technology (ICSPAT), 1997, pp. 829–833.
LibreCat
 
[213]
1996 | Conference Paper | LibreCat-ID: 13602
E. Lind, M. Platzner, and B. Rinner, “A Multi-DSP System with Dynamically Reconfigurable Processors,” in Proceedings of the 7th International Conference on Signal Processing Applications & Technology (ICSPAT), 1996.
LibreCat
 
[212]
1995 | Journal Article | LibreCat-ID: 10610
M. Platzner, B. Rinner, and R. Weiss, “Exploiting Parallelism in Constraint Satisfaction for Qualitative Simulation,” J.UCS Journal of Universal Computer Science, vol. 12, pp. 811–820, 1995.
LibreCat
 
[211]
1995 | Conference Paper | LibreCat-ID: 13469
M. Platzner, B. Rinner, and R. Weiss, “A Distributed Computer Architecture for Qualitative Simulation based on a Multi-DSP and FPGAs,” in Proceedings of the 3rd Euromicro Workshop on Parallel and Distributed Processing , 1995, pp. 311–318.
LibreCat
 
[210]
1995 | Conference Paper | LibreCat-ID: 13470
E. Brenner et al., “High-Performance Simulators Based on Multi-TMS320C40,” in Proceedings of the 5th Annual Texas Instruments TMS320 Educators Conference, 1995.
LibreCat
 
[209]
1995 | Conference Paper | LibreCat-ID: 13471
G. Friedl, M. Platzner, and B. Rinner, “A Special-Purpose Coprocessor for Qualitative Simulation,” in Proceedings of the EURO-PAR’95 International Conference on Parallel Processing, 1995, pp. 695–698.
LibreCat
 
[208]
1995 | Conference Paper | LibreCat-ID: 13472
M. Platzner, B. Rinner, and R. Weiss, “Parallel Qualitative Simulation,” in Proceedings of the EUROSIM Congress, 1995, pp. 231–236.
LibreCat
 
[207]
1995 | Conference Paper | LibreCat-ID: 13473
M. Platzner and B. Rinner, “Improving Performance of the Qualitative Simulator QSIM - Design and Implementation of a Specialized Computer Architecture,” in Proceedings of the PDCS International Conference on Parallel and Distributed Computing Systems, 1995, pp. 494–501.
LibreCat
 
[206]
1995 | Conference Paper | LibreCat-ID: 13474
M. Platzner and B. Rinner, “High-Performance Qualitative Simulation on a Multi-DSP Architecture,” in Proceedings of the 6th International Conference on Signal Processing Applications & Technology (ICSPAT), 1995.
LibreCat
 
[205]
1995 | Conference Paper | LibreCat-ID: 13484
R. Hranitzky and M. Platzner, “Design and Implementation of Adaptive Digital Filters on a Multi-TMS320C40 System,” in Proceedings of the 6th International Conference on Signal Processing Applications & Technology (ICSPAT), 1995.
LibreCat
 
[204]
1994 | Conference Paper | LibreCat-ID: 13468
M. Platzner, C. Steger, and R. Weiss, “Experimental Evaluation of Multi-DSP Architectures in High Performance Applications,” in Proceedings of the 7th Mediterranean Electrotechnical Conference, 1994.
LibreCat
 
[203]
1993 | Journal Article | LibreCat-ID: 13466
M. Platzner and C. Steger, “Erfahrungen mit einer Multi-Signalprozessorarchitektur (TMS320C40),” Mikroelektronik, 1993.
LibreCat
 
[202]
1993 | Conference Paper | LibreCat-ID: 13467
M. Platzner, C. Steger, and R. Weiss, “Performance Measurements on a Multi-DSP Architecture with TMS320C40,” in Proceedings of the 4th International Conference on Signal Processing Applications & Technology (ICSPAT), 1993.
LibreCat
 
[201]
1992 | Conference Paper | LibreCat-ID: 13465
R. Ginthör, M. Platzner, and R. Weiss, “Experimental Results to Interprocessor Communication in Distributed Transputer-Systems,” in Proceedings of the 1st Austrian-Hungarian Workshop on Transputer Applications, 1992, pp. 45–54.
LibreCat
 
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243 Publications

Mark all

[243]
2003 | Conference Paper | LibreCat-ID: 2422
R. Enzler, C. Plessl, and M. Platzner, “Co-simulation of a Hybrid Multi-Context Architecture,” in Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 2003, pp. 174–180.
LibreCat
 
[242]
2003 | Conference Paper | LibreCat-ID: 13612
H. Walder and M. Platzner, “Online scheduling for block-partitioned reconfigurable devices,” in Proceedings Design, Automation and Test in Europe Conference (DATE), 2003, pp. 290–295.
LibreCat | DOI
 
[241]
2003 | Conference Paper | LibreCat-ID: 13613
H. Walder, C. Steiger, and M. Platzner, “Fast online task placement on FPGAs: free space partitioning and 2D-hashing,” in Proceedings International Parallel and Distributed Processing Symposium, 2003.
LibreCat | DOI
 
[240]
2003 | Conference Paper | LibreCat-ID: 13614
H. Walder and M. Platzner, “Reconfigurable Hardware Operating Systems: From Design Concepts to Realizations,” in Proceedings of the 3rd International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA), 2003, pp. 284–287.
LibreCat
 
[239]
2003 | Conference Paper | LibreCat-ID: 13615
C. Steiger, H. Walder, and M. Platzner, “Heuristics for Online Scheduling Real-Time Tasks to Partially Reconfigurable Devices,” in Proceedings of the 13th International Conference on Field Programmable Logic and Applications (FPL), 2003, pp. 575–584.
LibreCat | DOI
 
[238]
2003 | Conference Paper | LibreCat-ID: 13617
C. Steiger, H. Walder, M. Platzner, and L. Thiele, “Online scheduling and placement of real-time tasks to partially reconfigurable devices,” in Proceedings 24th IEEE International Real-Time Systems Symposium (RTSS), 2003, pp. 252–235.
LibreCat | DOI
 
[237]
2002 | Conference Paper | LibreCat-ID: 2423
C. Plessl, R. Enzler, H. Walder, J. Beutel, M. Platzner, and L. Thiele, “Reconfigurable Hardware in Wearable Computing Nodes,” in Proc. Int. Symp. on Wearable Computers (ISWC), 2002, pp. 215–222.
LibreCat | DOI
 
[236]
2002 | Conference Paper | LibreCat-ID: 2424
M. Dyer, C. Plessl, and M. Platzner, “Partially Reconfigurable Cores for Xilinx Virtex,” in Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), 2002, vol. 2438, pp. 292–301.
LibreCat | DOI
 
[235]
2002 | Conference Paper | LibreCat-ID: 2425
C. Plessl and M. Platzner, “Custom Computing Machines for the Set Covering Problem,” in Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM), 2002, pp. 163–172.
LibreCat | DOI
 
[234]
2002 | Journal Article | LibreCat-ID: 10651
M. Eisenring and M. Platzner, “A Framework for Run-time Reconfigurable Systems,” The Journal of Supercomputing, vol. 21, no. 2, pp. 145–159, 2002.
LibreCat | DOI
 
[233]
2002 | Conference Paper | LibreCat-ID: 13611
H. Walder and M. Platzner, “Non-preemptive Multitasking on FPGAs: Task Placement and Footprint Transform,” in Proceedings of the 2nd International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA), 2002, pp. 24–30.
LibreCat
 
[232]
2001 | Conference Paper | LibreCat-ID: 2428
C. Plessl and M. Platzner, “Instance-Specific Accelerators for Minimum Covering,” in Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 2001, pp. 85–91.
LibreCat
 
[231]
2001 | Conference Paper | LibreCat-ID: 2432
R. Enzler, M. Platzner, C. Plessl, L. Thiele, and G. Tröster, “Reconfigurable Processors for Handhelds and Wearables: Application Analysis,” in Reconfigurable Technology: FPGAs and Reconfigurable Processors for Computing and Communications III, 2001, vol. 4525, pp. 135–146.
LibreCat | DOI
 
[230]
2001 | Journal Article | LibreCat-ID: 10713
O. Mencer, M. Platzner, M. Morf, and M. J. Flynn, “Object-oriented domain specific compilers for programming FPGAs,” {IEEE} Transactions on Very Large Scale Integration ({VLSI}) Systems, vol. 9, no. 1, pp. 205–210, 2001.
LibreCat | DOI
 
[229]
2001 | Misc | LibreCat-ID: 13463
R. Enzler and M. Platzner, Dynamically Reconfigurable Processors. TELEMATIK, Zeitschrift des Telematik-Ingebieur-Verbandes 7(1), 2001.
LibreCat
 
[228]
2000 | Journal Article | LibreCat-ID: 6507
M. Platzner, “Reconfigurable accelerators for combinatorial problems,” Computer, vol. 33, no. 4, pp. 58–60, 2000.
LibreCat | DOI
 
[227]
2000 | Journal Article | LibreCat-ID: 10606
M. Eisenring and M. Platzner, “Synthesis of Interfaces and Communication in Reconfigurable Embedded Systems,” IEE Proceedings -- Computers & Digital Techniques, vol. 147, pp. 159–165, 2000.
LibreCat | DOI
 
[226]
2000 | Journal Article | LibreCat-ID: 10725
M. Platzner, B. Rinner, and R. Weiss, “Toward embedded qualitative simulation: a specialized computer architecture for QSim,” IEEE Intelligent Systems, vol. 15, no. 2, pp. 62–68, 2000.
LibreCat | DOI
 
[225]
2000 | Conference Paper | LibreCat-ID: 13609
M. H. Eisenring and M. Platzner, “An Implementation Framework for Run-time Reconfigurable Systems,” in Proceedings of the 2nd International Workshop on Engineering of Reconfigurable Hardware/Software Objects (ENREGLE), 2000, pp. 151–157.
LibreCat
 
[224]
2000 | Conference Paper | LibreCat-ID: 13610
M. Eisenring and M. Platzner, “Optimization of Run-time Reconfigurable Embedded Systems,” in Proceedings of the 10th International Workshop on Field Programmable Logic and Applications (FPL), 2000, pp. 565–574.
LibreCat
 
[223]
1999 | Conference Paper | LibreCat-ID: 13607
O. Mencer and M. Platzner, “Dynamic circuit generation for Boolean satisfiability in an object-oriented design environment,” in Proceedings of the 32nd Annual Hawaii International Conference on Systems Sciences (HICSS-32), 1999.
LibreCat | DOI
 
[222]
1999 | Conference Paper | LibreCat-ID: 13608
M. Eisenring, M. Platzner, and L. Thiele, “Communication Synthesis for Reconfigurable Embedded Systems,” in Proceedings of the 9th International Workshop on Field Programmable Logic and Applications (FPL), 1999, vol. 1673, pp. 205–214.
LibreCat | DOI
 
[221]
1998 | Journal Article | LibreCat-ID: 10607
M. Platzner, “Reconfigurable Computer Architectures,” e&i Elektrotechnik und Informationstechnik, vol. 115, pp. 143–148, 1998.
LibreCat
 
[220]
1998 | Journal Article | LibreCat-ID: 10608
M. Platzner and B. Rinner, “Design and Implementation of a Parallel Constraint Satisfaction Algorithm,” International Journal of Computers & Their Applications, vol. 5, pp. 106–116, 1998.
LibreCat
 
[219]
1998 | Misc | LibreCat-ID: 13464
M. Platzner, B. Rinner, and R. Weiss, A Distributed Computer Architecture for Fast Qualitative Simulation . Texas Instruments, The Elite Yearbook 1997 - Digital Signal Processing Solutions from Europe’s leading Universities, 1998, pp. 106–107.
LibreCat
 
[218]
1998 | Conference Paper | LibreCat-ID: 13606
M. Platzner and G. De Micheli, “Acceleration of satisfiability algorithms by reconfigurable hardware,” in Proceedings of the 8th International Workshop on Field Programmable Logic and Applications (FPL) , 1998, pp. 69–78.
LibreCat | DOI
 
[217]
1997 | Journal Article | LibreCat-ID: 10609
M. Platzner, B. Rinner, and R. Weiss, “A Computer Architecture to Support Qualitative Simulation in Industrial Applications,” e & i Elektrotechnik und Informationstechnik, vol. 114, pp. 13–18, 1997.
LibreCat
 
[216]
1997 | Journal Article | LibreCat-ID: 10724
M. Platzner, B. Rinner, and R. Weiss, “Parallel qualitative simulation,” Simulation Practice and Theory, vol. 5, no. 7–8, pp. 623–638, 1997.
LibreCat | DOI
 
[215]
1997 | Conference Paper | LibreCat-ID: 13603
M. Platzner and L. Peters, “Fast Signature Segmentation on a Multi-DSP Architecture,” in Proceedings of the SPIE: Conference on Parallel and Distributed Methods for Image Processing, 1997, vol. 3166.
LibreCat
 
[214]
1997 | Conference Paper | LibreCat-ID: 13604
T. Röwekamp, M. Platzner, and L. Peters, “Specialized Architectures for Optical Flow Computation: A Performance Comparison of ASIC, DSP, and Multi-DSP,” in Proceedings of the 8th International Conference on Signal Processing Applications & Technology (ICSPAT), 1997, pp. 829–833.
LibreCat
 
[213]
1996 | Conference Paper | LibreCat-ID: 13602
E. Lind, M. Platzner, and B. Rinner, “A Multi-DSP System with Dynamically Reconfigurable Processors,” in Proceedings of the 7th International Conference on Signal Processing Applications & Technology (ICSPAT), 1996.
LibreCat
 
[212]
1995 | Journal Article | LibreCat-ID: 10610
M. Platzner, B. Rinner, and R. Weiss, “Exploiting Parallelism in Constraint Satisfaction for Qualitative Simulation,” J.UCS Journal of Universal Computer Science, vol. 12, pp. 811–820, 1995.
LibreCat
 
[211]
1995 | Conference Paper | LibreCat-ID: 13469
M. Platzner, B. Rinner, and R. Weiss, “A Distributed Computer Architecture for Qualitative Simulation based on a Multi-DSP and FPGAs,” in Proceedings of the 3rd Euromicro Workshop on Parallel and Distributed Processing , 1995, pp. 311–318.
LibreCat
 
[210]
1995 | Conference Paper | LibreCat-ID: 13470
E. Brenner et al., “High-Performance Simulators Based on Multi-TMS320C40,” in Proceedings of the 5th Annual Texas Instruments TMS320 Educators Conference, 1995.
LibreCat
 
[209]
1995 | Conference Paper | LibreCat-ID: 13471
G. Friedl, M. Platzner, and B. Rinner, “A Special-Purpose Coprocessor for Qualitative Simulation,” in Proceedings of the EURO-PAR’95 International Conference on Parallel Processing, 1995, pp. 695–698.
LibreCat
 
[208]
1995 | Conference Paper | LibreCat-ID: 13472
M. Platzner, B. Rinner, and R. Weiss, “Parallel Qualitative Simulation,” in Proceedings of the EUROSIM Congress, 1995, pp. 231–236.
LibreCat
 
[207]
1995 | Conference Paper | LibreCat-ID: 13473
M. Platzner and B. Rinner, “Improving Performance of the Qualitative Simulator QSIM - Design and Implementation of a Specialized Computer Architecture,” in Proceedings of the PDCS International Conference on Parallel and Distributed Computing Systems, 1995, pp. 494–501.
LibreCat
 
[206]
1995 | Conference Paper | LibreCat-ID: 13474
M. Platzner and B. Rinner, “High-Performance Qualitative Simulation on a Multi-DSP Architecture,” in Proceedings of the 6th International Conference on Signal Processing Applications & Technology (ICSPAT), 1995.
LibreCat
 
[205]
1995 | Conference Paper | LibreCat-ID: 13484
R. Hranitzky and M. Platzner, “Design and Implementation of Adaptive Digital Filters on a Multi-TMS320C40 System,” in Proceedings of the 6th International Conference on Signal Processing Applications & Technology (ICSPAT), 1995.
LibreCat
 
[204]
1994 | Conference Paper | LibreCat-ID: 13468
M. Platzner, C. Steger, and R. Weiss, “Experimental Evaluation of Multi-DSP Architectures in High Performance Applications,” in Proceedings of the 7th Mediterranean Electrotechnical Conference, 1994.
LibreCat
 
[203]
1993 | Journal Article | LibreCat-ID: 13466
M. Platzner and C. Steger, “Erfahrungen mit einer Multi-Signalprozessorarchitektur (TMS320C40),” Mikroelektronik, 1993.
LibreCat
 
[202]
1993 | Conference Paper | LibreCat-ID: 13467
M. Platzner, C. Steger, and R. Weiss, “Performance Measurements on a Multi-DSP Architecture with TMS320C40,” in Proceedings of the 4th International Conference on Signal Processing Applications & Technology (ICSPAT), 1993.
LibreCat
 
[201]
1992 | Conference Paper | LibreCat-ID: 13465
R. Ginthör, M. Platzner, and R. Weiss, “Experimental Results to Interprocessor Communication in Distributed Transputer-Systems,” in Proceedings of the 1st Austrian-Hungarian Workshop on Transputer Applications, 1992, pp. 45–54.
LibreCat
 
Marked Publication(s)

Search

Filter Publications

Display / Sort

Citation Style: IEEE

Export / Embed