Partitioning and Vectorizing Binary Applications for a Reconfigurable Vector Computer

T. Kenter, G.F. Vaz, C. Plessl, in:, Proceedings of the International Symposium on Reconfigurable Computing: Architectures, Tools, and Applications (ARC), Springer International Publishing, Cham, 2014, pp. 144–155.

Download
Restricted 388-plessl14_arc.pdf 330.19 KB
Conference Paper
Abstract
In order to leverage the use of reconfigurable architectures in general-purpose computing, quick and automated methods to find suitable accelerator designs are required. We tackle this challenge in both regards. In order to avoid long synthesis times, we target a vector copro- cessor, implemented on the FPGAs of a Convey HC-1. Previous studies showed that existing tools were not able to accelerate a real-world application with low effort. We present a toolflow to automatically identify suitable loops for vectorization, generate a corresponding hardware/software bipartition, and generate coprocessor code. Where applicable, we leverage outer-loop vectorization. We evaluate our tools with a set of characteristic loops, systematically analyzing different dependency and data layout properties.
Publishing Year
Journal Title
Proceedings of the International Symposium on Reconfigurable Computing: Architectures, Tools, and Applications (ARC)
Volume
8405
Page
144-155
LibreCat-ID

Cite this

Kenter T, Vaz GF, Plessl C. Partitioning and Vectorizing Binary Applications for a Reconfigurable Vector Computer. In: Proceedings of the International Symposium on Reconfigurable Computing: Architectures, Tools, and Applications (ARC).Vol 8405. Lecture Notes in Computer Science (LNCS). Cham: Springer International Publishing; 2014:144-155. doi:10.1007/978-3-319-05960-0_13.
Kenter, T., Vaz, G. F., & Plessl, C. (2014). Partitioning and Vectorizing Binary Applications for a Reconfigurable Vector Computer. In Proceedings of the International Symposium on Reconfigurable Computing: Architectures, Tools, and Applications (ARC) (Vol. 8405, pp. 144–155). Cham: Springer International Publishing. http://doi.org/10.1007/978-3-319-05960-0_13
@inbook{Kenter_Vaz_Plessl_2014, place={Cham}, series={Lecture Notes in Computer Science (LNCS)}, title={Partitioning and Vectorizing Binary Applications for a Reconfigurable Vector Computer}, volume={8405}, DOI={10.1007/978-3-319-05960-0_13}, booktitle={Proceedings of the International Symposium on Reconfigurable Computing: Architectures, Tools, and Applications (ARC)}, publisher={Springer International Publishing}, author={Kenter, Tobias and Vaz, Gavin Francis and Plessl, Christian}, year={2014}, pages={144–155}, collection={Lecture Notes in Computer Science (LNCS)}}
Kenter, Tobias, Gavin Francis Vaz, and Christian Plessl. “Partitioning and Vectorizing Binary Applications for a Reconfigurable Vector Computer.” In Proceedings of the International Symposium on Reconfigurable Computing: Architectures, Tools, and Applications (ARC), 8405:144–55. Lecture Notes in Computer Science (LNCS). Cham: Springer International Publishing, 2014. doi:10.1007/978-3-319-05960-0_13.
T. Kenter, G. F. Vaz, and C. Plessl, “Partitioning and Vectorizing Binary Applications for a Reconfigurable Vector Computer,” in Proceedings of the International Symposium on Reconfigurable Computing: Architectures, Tools, and Applications (ARC), 2014, vol. 8405, pp. 144–155.
Kenter, Tobias, Gavin Francis Vaz, and Christian Plessl. “Partitioning and Vectorizing Binary Applications for a Reconfigurable Vector Computer.” Proceedings of the International Symposium on Reconfigurable Computing: Architectures, Tools, and Applications (ARC). Vol. 8405. Cham: Springer International Publishing, 2014. 144–155. Web. Lecture Notes in Computer Science (LNCS).
Main File(s)
File Name
388-plessl14_arc.pdf 330.19 KB
Access Level
Restricted Closed Access
Last Uploaded
2018-03-20T07:02:02Z

frontdoor.tabs.publications.cited_by
This publication cites the following data publications:

Export

Marked Publications

Open Data LibreCat

Search this title in

Google Scholar