SFB 901 - Subproject C2

Project Period: 2011-07-01
Externally Funded
Acronym
SFB 901 - C2
Principal Investigator
Marco Platzner, Friedhelm Meyer auf der Heide, André Brinkmann, Christian Plessl
Funding Organisation
DFG

73 Publications

2014 | Journal Article | LibreCat-ID: 363
Seven Recipes for Setting Your FPGA on Fire – A Cookbook on Heat Generators
A. Agne, H. Hangmann, M. Happe, M. Platzner, C. Plessl, Microprocessors and Microsystems 38 (2014) 911–919.
LibreCat | Files available | DOI
 
2014 | Conference Paper | LibreCat-ID: 368
Scheduling Shared Continuous Resources on Many-Cores
A. Brinkmann, P. Kling, F. Meyer auf der Heide, L. Nagel, S. Riechers, T. Süss, in: Proceedings of the 26th ACM Symposium on Parallelism in Algorithms and Architectures (SPAA), 2014, pp. 128–137.
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2018 | Conference Paper | LibreCat-ID: 1588
OpenCL-based FPGA Design to Accelerate the Nodal Discontinuous Galerkin Method for Unstructured Meshes
T. Kenter, G. Mahale, S. Alhaddad, Y. Grynko, C. Schmitt, A. Afzal, F. Hannig, J. Förstner, C. Plessl, in: Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM), IEEE, 2018.
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2016 | Dissertation | LibreCat-ID: 161
Reconfigurable Accelerators in the World of General-Purpose Computing
T. Kenter, Reconfigurable Accelerators in the World of General-Purpose Computing, Universität Paderborn, 2016.
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2012 | Conference Paper | LibreCat-ID: 591
Pragma based parallelization - Trading hardware efficiency for ease of use?
T. Kenter, C. Plessl, H. Schmitz, in: Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), IEEE, 2012, pp. 1–8.
LibreCat | Files available | DOI
 
2012 | Bachelorsthesis | LibreCat-ID: 611
Generating Adjustable Temperature Gradients on modern FPGAs
H. Hangmann, Generating Adjustable Temperature Gradients on Modern FPGAs, Universität Paderborn, 2012.
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2018 | Conference Paper | LibreCat-ID: 5547
A Highly Accurate Energy Model for Task Execution on Heterogeneous Compute Nodes
A. Lösch, M. Platzner, in: 2018 IEEE 29th International Conference on Application-Specific Systems, Architectures and Processors (ASAP), IEEE, 2018.
LibreCat | Files available | DOI
 
2018 | Conference Paper | LibreCat-ID: 1204
Automated Code Acceleration Targeting Heterogeneous OpenCL Devices
H. Riebler, G.F. Vaz, T. Kenter, C. Plessl, in: Proc. ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming (PPoPP), ACM, 2018.
LibreCat | Files available | DOI
 
2017 | Conference Paper | LibreCat-ID: 65
reMinMin: A Novel Static Energy-Centric List Scheduling Approach Based on Real Measurements
A. Lösch, M. Platzner, in: Proceedings of the 28th Annual IEEE International Conference on Application-Specific Systems, Architectures and Processors (ASAP), 2017.
LibreCat | Files available | DOI
 
2012 | Conference Paper | LibreCat-ID: 609
Hardware/Software Platform for Self-aware Compute Nodes
M. Happe, A. Agne, C. Plessl, M. Platzner, in: Proceedings of the Workshop on Self-Awareness in Reconfigurable Computing Systems (SRCS), 2012, pp. 8–9.
LibreCat | Files available
 
2015 | Bachelorsthesis | LibreCat-ID: 3364
Evaluation von Bildverarbeitungsalgorithmen in heterogenen Rechenknoten
C. Knorr, Evaluation von Bildverarbeitungsalgorithmen in heterogenen Rechenknoten, 2015.
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2014 | Conference Paper | LibreCat-ID: 388
Partitioning and Vectorizing Binary Applications for a Reconfigurable Vector Computer
T. Kenter, G.F. Vaz, C. Plessl, in: Proceedings of the International Symposium on Reconfigurable Computing: Architectures, Tools, and Applications (ARC), Springer International Publishing, Cham, 2014, pp. 144–155.
LibreCat | Files available | DOI
 
2012 | Conference Paper | LibreCat-ID: 612
Exploration of Ring Oscillator Design Space for Temperature Measurements on FPGAs
C. Rüthing, M. Happe, A. Agne, C. Plessl, in: Proceedings of the International Conference on Field Programmable Logic and Applications (FPL), IEEE, 2012, pp. 559–562.
LibreCat | Files available | DOI
 
2011 | Mastersthesis | LibreCat-ID: 643
User-space Scheduling for Heterogeneous System under Linux
D. Welp, User-Space Scheduling for Heterogeneous System under Linux, Universität Paderborn, 2011.
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2014 | Conference Paper | LibreCat-ID: 439
Deferring Accelerator Offloading Decisions to Application Runtime
G.F. Vaz, H. Riebler, T. Kenter, C. Plessl, in: Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), IEEE, 2014, pp. 1–8.
LibreCat | Files available | DOI
 
2014 | Mastersthesis | LibreCat-ID: 460
Advanced AES-key recovery from decayed RAM-dumps using multi-threading and FPGAs
R. Mittendorf, Advanced AES-Key Recovery from Decayed RAM-Dumps Using Multi-Threading and FPGAs, Universität Paderborn, 2014.
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2013 | Mastersthesis | LibreCat-ID: 489
Scheduling Variants with Speed-Scaling via the Primal-Dual Approach
M. Knopf, Scheduling Variants with Speed-Scaling via the Primal-Dual Approach, Universität Paderborn, 2013.
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2013 | Conference Paper | LibreCat-ID: 528
FPGA-accelerated Key Search for Cold-Boot Attacks against AES
H. Riebler, T. Kenter, C. Sorge, C. Plessl, in: Proceedings of the International Conference on Field-Programmable Technology (FPT), IEEE, 2013, pp. 386–389.
LibreCat | Files available | DOI
 
2015 | Mastersthesis | LibreCat-ID: 5416
Instance-Specific Computing in Hard- and Software for Faster Solving of Complex Problems
T. Löcke, Instance-Specific Computing in Hard- and Software for Faster Solving of Complex Problems, 2015.
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2012 | Conference Paper | LibreCat-ID: 580
Slow Down & Sleep for Profit in Online Deadline Scheduling
A. Cord-Landwehr, P. Kling, F. Mallmann Trenn, in: G. Even, D. Rawitz (Eds.), Proceedings of the 1st Mediterranean Conference on Algorithms (MedAlg), 2012, pp. 218–231.
LibreCat | Files available | DOI
 
2018 | Conference Paper | LibreCat-ID: 3362
Ampehre: An Open Source Measurement Framework for Heterogeneous Compute Nodes
A. Lösch, A. Wiens, M. Platzner, in: Proceedings of the International Conference on Architecture of Computing Systems (ARCS), Springer International Publishing, Cham, 2018, pp. 73–84.
LibreCat | Files available | DOI
 
2014 | Bachelorsthesis | LibreCat-ID: 348
The Xilinx Zynq Architecture as a Platform for Reconfigurable Heterogeneous Multi-Cores
C. Rüthing, The Xilinx Zynq Architecture as a Platform for Reconfigurable Heterogeneous Multi-Cores, Universität Paderborn, 2014.
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2014 | Conference Paper | LibreCat-ID: 374
Relocatable Hardware Threads in Run-Time Reconfigurable Systems
A. Wold, A. Agne, J. Torresen, in: D. Goehringer, M. Santambrogio, J.P. Cardoso, K. Bertels (Eds.), Proceedings of the 10th International Symposium on Reconfigurable Computing: Architectures, Tools, and Applications, 2014, pp. 61–72.
LibreCat | Files available | DOI
 
2014 | Conference Paper | LibreCat-ID: 406
Kernel-Centric Acceleration of High Accuracy Stereo-Matching
T. Kenter, H. Schmitz, C. Plessl, in: Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), IEEE, 2014, pp. 1–8.
LibreCat | Files available | DOI
 
2016 | Journal Article | LibreCat-ID: 165
Potential and Methods for Embedding Dynamic Offloading Decisions into Application Code
G.F. Vaz, H. Riebler, T. Kenter, C. Plessl, Computers and Electrical Engineering 55 (2016) 91–111.
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2015 | Journal Article | LibreCat-ID: 1772
Self-Aware and Self-Expressive Systems – Guest Editor's Introduction
J. Torresen, C. Plessl, X. Yao, IEEE Computer 48 (2015) 18–20.
LibreCat | Files available | DOI
 
2013 | Mastersthesis | LibreCat-ID: 521
Identifikation und Wiederherstellung von kryptographischen Schlüsseln mit FPGAs
H. Riebler, Identifikation und Wiederherstellung von kryptographischen Schlüsseln mit FPGAs, Universität Paderborn, 2013.
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2018 | Mastersthesis | LibreCat-ID: 5414
Study Effects of Approximation on Conjugate Gradient Algorithm and Accelerate it on FPGA Platform
T. Filmwala, Study Effects of Approximation on Conjugate Gradient Algorithm and Accelerate It on FPGA Platform, 2018.
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2015 | Mastersthesis | LibreCat-ID: 5419
Accelerating Programmable Logic Controllers with the use of FPGAs
F. Wallaschek, Accelerating Programmable Logic Controllers with the Use of FPGAs, 2015.
LibreCat
 
2018 | Mastersthesis | LibreCat-ID: 5421
Programmable Programs? - Designing FPGA Overlay Architectures with OpenCL
O. Gadewar, Programmable Programs? - Designing FPGA Overlay Architectures with OpenCL, 2018.
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2012 | Bachelorsthesis | LibreCat-ID: 576
Stereo Matching on a Convey HC-1 Hybrid Core Computer
H. Schmitz, Stereo Matching on a Convey HC-1 Hybrid Core Computer, Universität Paderborn, 2012.
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2012 | Bachelorsthesis | LibreCat-ID: 595
On scheduling with multi-core and multi-speed processors using power down
F. Mallmann Trenn, On Scheduling with Multi-Core and Multi-Speed Processors Using Power Down, Universität Paderborn, 2012.
LibreCat
 
2012 | Conference Paper | LibreCat-ID: 615
Eight Ways to put your FPGA on Fire – A Systematic Study of Heat Generators
M. Happe, H. Hangmann, A. Agne, C. Plessl, in: Proceedings of the International Conference on Reconfigurable Computing and FPGAs (ReConFig), IEEE, 2012, pp. 1–8.
LibreCat | Files available | DOI
 
2012 | Bachelorsthesis | LibreCat-ID: 634
Analyse und Simulation von energieeffizienten Online-Scheduling Algorithmen
J. Kratzmann, Analyse und Simulation von energieeffizienten Online-Scheduling Algorithmen, Universität Paderborn, 2012.
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2014 | Conference Paper | LibreCat-ID: 451
Budget-restricted utility games with ordered strategic decisions
M. Drees, S. Riechers, A. Skopalik, in: R. Lavi (Ed.), Proceedings of the 7th International Symposium on Algorithmic Game Theory (SAGT), 2014, pp. 110–121.
LibreCat | Files available | DOI
 
2013 | Conference Paper | LibreCat-ID: 499
Profitable Scheduling on Multiple Speed-Scalable Processors
P. Kling, P. Pietrzyk, in: Proceedings of the 25th ACM Symposium on Parallelism in Algorithms and Architectures (SPAA), 2013, pp. 251–260.
LibreCat | Files available | DOI
 
2014 | Book Chapter | LibreCat-ID: 335
Verschiebungen an der Grenze zwischen Hardware und Software
M. Platzner, C. Plessl, in: J. Künsemöller, N.O. Eke, L. Foit, T. Kaerlein (Eds.), Logiken strukturbildender Prozesse: Automatismen, Wilhelm Fink, Paderborn, 2014, pp. 123–144.
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2018 | Bachelorsthesis | LibreCat-ID: 3366
Evaluation of OpenCL-based Compilation for FPGAs
M. Croce, Evaluation of OpenCL-Based Compilation for FPGAs, 2018.
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2014 | Dissertation | LibreCat-ID: 431
Energy-efficient Scheduling Algorithms
P. Kling, Energy-Efficient Scheduling Algorithms, Universität Paderborn, 2014.
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2014 | Mastersthesis | LibreCat-ID: 436
Easy-to-use on-the-fly binary program acceleration on many-cores
M. Damschen, Easy-to-Use on-the-Fly Binary Program Acceleration on Many-Cores, Universität Paderborn, 2014.
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2015 | Journal Article | LibreCat-ID: 296
Exploring Tradeoffs between Specialized Kernels and a Reusable Overlay in a Stereo-Matching Case Study
T. Kenter, H. Schmitz, C. Plessl, International Journal of Reconfigurable Computing (IJRC) 2015 (2015).
LibreCat | Files available | DOI
 
2014 | Journal Article | LibreCat-ID: 328
ReconOS - An Operating System Approach for Reconfigurable Computing
A. Agne, M. Happe, A. Keller, E. Lübbers, B. Plattner, M. Platzner, C. Plessl, IEEE Micro 34 (2014) 60–71.
LibreCat | Files available | DOI
 
2016 | Conference Paper | LibreCat-ID: 138
Using Just-in-Time Code Generation for Transparent Resource Management in Heterogeneous Systems
H. Riebler, G.F. Vaz, C. Plessl, E.M.G. Trainiti, G.C. Durelli, E. Del Sozzo, M.D. Santambrogio, C. Bolchini, in: Proceedings of International Forum on Research and Technologies for Society and Industry (RTSI), IEEE, 2016, pp. 1–5.
LibreCat | Files available | DOI
 
2016 | Conference Paper | LibreCat-ID: 171
Opportunities for deferring application partitioning and accelerator synthesis to runtime (extended abstract)
T. Kenter, G.F. Vaz, H. Riebler, C. Plessl, in: Workshop on Reconfigurable Computing (WRC), 2016.
LibreCat | Files available
 
2017 | Journal Article | LibreCat-ID: 18
Efficient Branch and Bound on FPGAs Using Work Stealing and Instance-Specific Designs
H. Riebler, M. Lass, R. Mittendorf, T. Löcke, C. Plessl, ACM Transactions on Reconfigurable Technology and Systems (TRETS) 10 (2017) 24:1-24:23.
LibreCat | Files available | DOI
 
2012 | Journal Article | LibreCat-ID: 587
Programming models for reconfigurable heterogeneous multi-cores
C. Plessl, M. Platzner, A. Agne, M. Happe, E. Lübbers, Self-Awareness in Autonomic Systems (2012).
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2011 | Conference Paper | LibreCat-ID: 664
An Experimental Comparison of Load Balancing Strategies in a Web Computing Environment
J. Gehweiler, P. Kling, F. Meyer auf der Heide, in: Proceedings of the 9th International Conference on Parallel Processing and Applied Mathematics (PPAM), 2011, pp. 31--40.
LibreCat | Files available | DOI
 
2013 | Dissertation | LibreCat-ID: 501
Performance and thermal management on self-adaptive hybrid multi-cores
M. Happe, Performance and Thermal Management on Self-Adaptive Hybrid Multi-Cores, Universität Paderborn, 2013.
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2015 | Mastersthesis | LibreCat-ID: 5413
An LLVM Based Toolchain for Transparent Acceleration of Digital Image Processing Applications using FPGA Overlay Architectures
L. Funke, An LLVM Based Toolchain for Transparent Acceleration of Digital Image Processing Applications Using FPGA Overlay Architectures, 2015.
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2016 | Mastersthesis | LibreCat-ID: 5418
Sicherheit von hybriden FPGA-Systemen in der industriellen Automatisierungstechnik -- Anforderungen und Umsetzung
C. Tölke, Sicherheit von Hybriden FPGA-Systemen in Der Industriellen Automatisierungstechnik -- Anforderungen Und Umsetzung, 2016.
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2016 | Mastersthesis | LibreCat-ID: 5420
Dynamic OpenCL Task Scheduling for Energy and Performance in a Heterogeneous Environment
G. Wüllrich, Dynamic OpenCL Task Scheduling for Energy and Performance in a Heterogeneous Environment, 2016.
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2013 | Bachelorsthesis | LibreCat-ID: 549
Beschleunigung von Tiefenberechung aus Stereobildern durch FPGA-basierte Datenflussrechner
C. Bick, Beschleunigung von Tiefenberechung aus Stereobildern durch FPGA-basierte Datenflussrechner, Universität Paderborn, 2013.
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2014 | Conference Paper | LibreCat-ID: 347
Thread Shadowing: Using Dynamic Redundancy on Hybrid Multi-cores for Error Detection
S. Meisner, M. Platzner, in: D. Goehringer, M. Santambrogio, J.P. Cardoso, K. Bertels (Eds.), Proceedings of the 10th International Symposium on Reconfigurable Computing: Architectures, Tools, and Applications, 2014, pp. 283–290.
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2018 | Bachelorsthesis | LibreCat-ID: 3365
Static Scheduling Algorithms for Heterogeneous Compute Nodes
J.-P. Schnuer, Static Scheduling Algorithms for Heterogeneous Compute Nodes, 2018.
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2014 | Journal Article | LibreCat-ID: 365
Self-awareness as a Model for Designing and Operating Heterogeneous Multicores
A. Agne, M. Happe, A. Lösch, C. Plessl, M. Platzner, ACM Transactions on Reconfigurable Technology and Systems (TRETS) 7 (2014).
LibreCat | Files available | DOI
 
2014 | Conference Paper | LibreCat-ID: 377
Reconstructing AES Key Schedules from Decayed Memory with FPGAs
H. Riebler, T. Kenter, C. Plessl, C. Sorge, in: Proceedings of Field-Programmable Custom Computing Machines (FCCM), IEEE, 2014, pp. 222–229.
LibreCat | Files available | DOI
 
2015 | Conference Paper | LibreCat-ID: 238
Transparent offloading of computational hotspots from binary code to Xeon Phi
M. Damschen, H. Riebler, G.F. Vaz, C. Plessl, in: Proceedings of the 2015 Conference on Design, Automation and Test in Europe (DATE), EDA Consortium / IEEE, 2015, pp. 1078–1083.
LibreCat | Files available | DOI
 
2016 | Conference Paper | LibreCat-ID: 24
Microdisk Cavity FDTD Simulation on FPGA using OpenCL
T. Kenter, C. Plessl, in: Proc. Workshop on Heterogeneous High-Performance Reconfigurable Computing (H2RC), 2016.
LibreCat | Files available
 
2015 | Conference Paper | LibreCat-ID: 303
Easy-to-Use On-The-Fly Binary Program Acceleration on Many-Cores
M. Damschen, C. Plessl, in: Proceedings of the 5th International Workshop on Adaptive Self-Tuning Computing Systems (ADAPT), 2015.
LibreCat | Files available
 
2016 | Conference Paper | LibreCat-ID: 31
Using Just-in-Time Code Generation for Transparent Resource Management in Heterogeneous Systems
H. Riebler, G.F. Vaz, C. Plessl, E.M.G. Trainiti, G.C. Durelli, C. Bolchini, in: Proc. HiPEAC Workshop on Reonfigurable Computing (WRC), 2016.
LibreCat | Files available
 
2014 | Bachelorsthesis | LibreCat-ID: 334
Vertical Thread Migration in FPGA based Sound Localization
P. Wagener, Vertical Thread Migration in FPGA Based Sound Localization, Universität Paderborn, 2014.
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2016 | Book Chapter | LibreCat-ID: 156
Self-aware Compute Nodes
A. Agne, M. Happe, A. Lösch, C. Plessl, M. Platzner, in: Self-Aware Computing Systems, Springer International Publishing, Cham, 2016, pp. 145–165.
LibreCat | Files available | DOI
 
2017 | Conference Paper | LibreCat-ID: 1592
Flexible FPGA design for FDTD using OpenCL
T. Kenter, J. Förstner, C. Plessl, in: Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), IEEE, 2017.
LibreCat | Files available | DOI
 
2016 | Conference Paper | LibreCat-ID: 168
Performance-centric scheduling with task migration for a heterogeneous compute node in the data center
A. Lösch, T. Beisel, T. Kenter, C. Plessl, M. Platzner, in: Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition (DATE), EDA Consortium / IEEE, 2016, pp. 912–917.
LibreCat | Files available
 
2017 | Mastersthesis | LibreCat-ID: 74
OpenCL-basierte Videoverarbeitung auf heterogenen Rechenknoten
C. Knorr, OpenCL-basierte Videoverarbeitung auf heterogenen Rechenknoten, Universität Paderborn, 2017.
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2014 | Mastersthesis | LibreCat-ID: 466
A generalized loop accelerator implemented as a coarse grained array.
M. Brand, A Generalized Loop Accelerator Implemented as a Coarse Grained Array., Universität Paderborn, 2014.
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2013 | Conference Paper | LibreCat-ID: 505
On-The-Fly Computing: A Novel Paradigm for Individualized IT Services
M. Happe, P. Kling, C. Plessl, M. Platzner, F. Meyer auf der Heide, in: Proceedings of the 9th IEEE Workshop on Software Technology for Future Embedded and Ubiquitous Systems (SEUS), IEEE, 2013.
LibreCat | Files available | DOI
 
2018 | Mastersthesis | LibreCat-ID: 5417
Accelerating Molecular Dynamic Simulations by Offloading Fast Fourier Transformations to FPGA
A. Ramaswami, Accelerating Molecular Dynamic Simulations by Offloading Fast Fourier Transformations to FPGA, 2018.
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2013 | Bachelorsthesis | LibreCat-ID: 550
Bandbreiten-beschränktes Scheduling mit skalierbaren Jobanforderungen in Multiprozessor-Umgebungen
J. Meschede, Bandbreiten-beschränktes Scheduling mit skalierbaren Jobanforderungen in Multiprozessor-Umgebungen, Universität Paderborn, 2013.
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2012 | Conference Paper | LibreCat-ID: 567
Turning control flow graphs into function calls: Code generation for heterogeneous architectures
P. Barrio, C. Carreras, R. Sierra, T. Kenter, C. Plessl, in: Proceedings of the International Conference on High Performance Computing and Simulation (HPCS), IEEE, 2012, pp. 559–565.
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2011 | Conference Paper | LibreCat-ID: 656
Measuring and Predicting Temperature Distributions on FPGAs at Run-Time
M. Happe, A. Agne, C. Plessl, in: Proceedings of the 2011 International Conference on Reconfigurable Computing and FPGAs (ReConFig), IEEE, 2011, pp. 55–60.
LibreCat | Files available | DOI
 
2019 | Journal Article | LibreCat-ID: 7689
Transparent Acceleration for Heterogeneous Platforms with Compilation to OpenCL (to appear)
H. Riebler, G.F. Vaz, T. Kenter, C. Plessl, ACM Trans. Archit. Code Optim. (TACO) (2019).
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2014 | Conference Paper | LibreCat-ID: 435
Efficient Computation of Optimal Energy and Fractional Weighted Flow Trade-off Schedules
A. Antoniadis, N. Barcelo, M. Consuegra, P. Kling, M. Nugent, K. Pruhs, M. Scquizzato, in: Proceedings of the 31st Symposium on Theoretical Aspects of Computer Science (STACS), 2014, pp. 63--74.
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