Pragma based parallelization - Trading hardware efficiency for ease of use?

T. Kenter, C. Plessl, H. Schmitz, in:, Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), IEEE, 2012, pp. 1–8.

Download
Restricted 591-ReConFig2012Kenter_Schmitz_Plessl.pdf 371.24 KB
Conference Paper
Abstract
One major obstacle for a wide spread FPGA usage in general-purpose computing is the development tool flow that requires much higher effort than for pure software solutions. Convey Computer promises a solution to this problem for their HC-1 platform, where the FPGAs are configured to run as a vector processor and the software source code can be annotated with pragmas that guide an automated vectorization process. We investigate this approach for a stereo matching algorithm that has abundant parallelism and a number of different computational patterns. We note that for this case study the automated vectorization in its current state doesn’t hold its productivity promise. However, we also show that using the Vector Personality can yield a significant speedups compared to CPU implementations in two of three investigated phases of the algorithm. Those speedups don’t match custom FPGA implementations, but can come with much reduced development effort.
Publishing Year
Proceedings Title
Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig)
Page
1-8
LibreCat-ID

Cite this

Kenter T, Plessl C, Schmitz H. Pragma based parallelization - Trading hardware efficiency for ease of use? In: Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig). IEEE; 2012:1-8. doi:10.1109/ReConFig.2012.6416773.
Kenter, T., Plessl, C., & Schmitz, H. (2012). Pragma based parallelization - Trading hardware efficiency for ease of use? In Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig) (pp. 1–8). IEEE. http://doi.org/10.1109/ReConFig.2012.6416773
@inbook{Kenter_Plessl_Schmitz_2012, title={Pragma based parallelization - Trading hardware efficiency for ease of use?}, DOI={10.1109/ReConFig.2012.6416773}, booktitle={Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig)}, publisher={IEEE}, author={Kenter, Tobias and Plessl, Christian and Schmitz, Henning}, year={2012}, pages={1–8}}
Kenter, Tobias, Christian Plessl, and Henning Schmitz. “Pragma Based Parallelization - Trading Hardware Efficiency for Ease of Use?” In Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), 1–8. IEEE, 2012. doi:10.1109/ReConFig.2012.6416773.
T. Kenter, C. Plessl, and H. Schmitz, “Pragma based parallelization - Trading hardware efficiency for ease of use?,” in Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), 2012, pp. 1–8.
Kenter, Tobias, Christian Plessl, and Henning Schmitz. “Pragma Based Parallelization - Trading Hardware Efficiency for Ease of Use?” Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig). IEEE, 2012. 1–8. Web.
Main File(s)
File Name
591-ReConFig2012Kenter_Schmitz_Plessl.pdf 371.24 KB
Access Level
Restricted Closed Access
Last Uploaded
2018-03-15T08:33:18Z


Export

Marked Publications

Open Data LibreCat

Search this title in

Google Scholar