An Efficient Fault Tolerant Mechanism to Deal with Permanent and Transient Failures in a Network on Chip

M. Ali, S. Hessler, M. Welzl, S. Hellebrand, International Journal on High Performance Systems Architecture 1 (2007) 113–123.

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Journal Article | English
Author
Ali, Muhammad; Hessler, Sven; Welzl, Michael; Hellebrand, SybilleLibreCat
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Journal Title
International Journal on High Performance Systems Architecture
Volume
1
Issue
2
Page
113-123
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Ali M, Hessler S, Welzl M, Hellebrand S. An Efficient Fault Tolerant Mechanism to Deal with Permanent and Transient Failures in a Network on Chip. International Journal on High Performance Systems Architecture. 2007;1(2):113-123.
Ali, M., Hessler, S., Welzl, M., & Hellebrand, S. (2007). An Efficient Fault Tolerant Mechanism to Deal with Permanent and Transient Failures in a Network on Chip. International Journal on High Performance Systems Architecture, 1(2), 113–123.
@article{Ali_Hessler_Welzl_Hellebrand_2007, title={An Efficient Fault Tolerant Mechanism to Deal with Permanent and Transient Failures in a Network on Chip}, volume={1}, number={2}, journal={International Journal on High Performance Systems Architecture}, author={Ali, Muhammad and Hessler, Sven and Welzl, Michael and Hellebrand, Sybille}, year={2007}, pages={113–123} }
Ali, Muhammad, Sven Hessler, Michael Welzl, and Sybille Hellebrand. “An Efficient Fault Tolerant Mechanism to Deal with Permanent and Transient Failures in a Network on Chip.” International Journal on High Performance Systems Architecture 1, no. 2 (2007): 113–23.
M. Ali, S. Hessler, M. Welzl, and S. Hellebrand, “An Efficient Fault Tolerant Mechanism to Deal with Permanent and Transient Failures in a Network on Chip,” International Journal on High Performance Systems Architecture, vol. 1, no. 2, pp. 113–123, 2007.
Ali, Muhammad, et al. “An Efficient Fault Tolerant Mechanism to Deal with Permanent and Transient Failures in a Network on Chip.” International Journal on High Performance Systems Architecture, vol. 1, no. 2, 2007, pp. 113–23.

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