Automatic Mapping of the Sum-Product Network Inference Problem to FPGA-Based Accelerators

L. Sommer, J. Oppermann, A. Molina, C. Binnig, K. Kersting, A. Koch, in: 2018 IEEE 36th International Conference on Computer Design (ICCD), 2019.

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Conference Paper | Published | English
Author
Sommer, Lukas; Oppermann, Julian; Molina, Alejandro; Binnig, Carsten; Kersting, Kristian; Koch, Andreas
Abstract
In recent years, FPGAs have been successfully employed for the implementation of efficient, application-specific accelerators for a wide range of machine learning tasks. In this work, we consider probabilistic models, namely, (Mixed) Sum-Product Networks (SPN), a deep architecture that can provide tractable inference for multivariate distributions over mixed data-sources. We develop a fully pipelined FPGA accelerator architecture, including a pipelined interface to external memory, for the inference in (mixed) SPNs. To meet the precision constraints of SPNs, all computations are conducted using double-precision floating point arithmetic. Starting from an input description, the custom FPGA-accelerator is synthesized fully automatically by our tool flow. To the best of our knowledge, this work is the first approach to offload the SPN inference problem to FPGA-based accelerators. Our evaluation shows that the SPN inference problem benefits from offloading to our pipelined FPGA accelerator architecture.
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2018 IEEE 36th International Conference on Computer Design (ICCD)
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Sommer L, Oppermann J, Molina A, Binnig C, Kersting K, Koch A. Automatic Mapping of the Sum-Product Network Inference Problem to FPGA-Based Accelerators. In: 2018 IEEE 36th International Conference on Computer Design (ICCD). ; 2019. doi:10.1109/iccd.2018.00060
Sommer, L., Oppermann, J., Molina, A., Binnig, C., Kersting, K., & Koch, A. (2019). Automatic Mapping of the Sum-Product Network Inference Problem to FPGA-Based Accelerators. In 2018 IEEE 36th International Conference on Computer Design (ICCD). https://doi.org/10.1109/iccd.2018.00060
@inproceedings{Sommer_Oppermann_Molina_Binnig_Kersting_Koch_2019, title={Automatic Mapping of the Sum-Product Network Inference Problem to FPGA-Based Accelerators}, DOI={10.1109/iccd.2018.00060}, booktitle={2018 IEEE 36th International Conference on Computer Design (ICCD)}, author={Sommer, Lukas and Oppermann, Julian and Molina, Alejandro and Binnig, Carsten and Kersting, Kristian and Koch, Andreas}, year={2019} }
Sommer, Lukas, Julian Oppermann, Alejandro Molina, Carsten Binnig, Kristian Kersting, and Andreas Koch. “Automatic Mapping of the Sum-Product Network Inference Problem to FPGA-Based Accelerators.” In 2018 IEEE 36th International Conference on Computer Design (ICCD), 2019. https://doi.org/10.1109/iccd.2018.00060.
L. Sommer, J. Oppermann, A. Molina, C. Binnig, K. Kersting, and A. Koch, “Automatic Mapping of the Sum-Product Network Inference Problem to FPGA-Based Accelerators,” in 2018 IEEE 36th International Conference on Computer Design (ICCD), 2019.
Sommer, Lukas, et al. “Automatic Mapping of the Sum-Product Network Inference Problem to FPGA-Based Accelerators.” 2018 IEEE 36th International Conference on Computer Design (ICCD), 2019, doi:10.1109/iccd.2018.00060.

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