Exploiting Hardware-Based Data-Parallel and Multithreading Models for Smart Edge Computing in Reconfigurable FPGAs
A. Rodriguez, A. Otero, M. Platzner, E. De la Torre, IEEE Transactions on Computers (2021) 1–1.
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| English
Author
Rodriguez, Alfonso;
Otero, Andres;
Platzner, MarcoLibreCat;
De la Torre, Eduardo
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IEEE Transactions on Computers
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1-1
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Rodriguez A, Otero A, Platzner M, De la Torre E. Exploiting Hardware-Based Data-Parallel and Multithreading Models for Smart Edge Computing in Reconfigurable FPGAs. IEEE Transactions on Computers. Published online 2021:1-1. doi:10.1109/tc.2021.3107196
Rodriguez, A., Otero, A., Platzner, M., & De la Torre, E. (2021). Exploiting Hardware-Based Data-Parallel and Multithreading Models for Smart Edge Computing in Reconfigurable FPGAs. IEEE Transactions on Computers, 1–1. https://doi.org/10.1109/tc.2021.3107196
@article{Rodriguez_Otero_Platzner_De la Torre_2021, title={Exploiting Hardware-Based Data-Parallel and Multithreading Models for Smart Edge Computing in Reconfigurable FPGAs}, DOI={10.1109/tc.2021.3107196}, journal={IEEE Transactions on Computers}, publisher={Institute of Electrical and Electronics Engineers (IEEE)}, author={Rodriguez, Alfonso and Otero, Andres and Platzner, Marco and De la Torre, Eduardo}, year={2021}, pages={1–1} }
Rodriguez, Alfonso, Andres Otero, Marco Platzner, and Eduardo De la Torre. “Exploiting Hardware-Based Data-Parallel and Multithreading Models for Smart Edge Computing in Reconfigurable FPGAs.” IEEE Transactions on Computers, 2021, 1–1. https://doi.org/10.1109/tc.2021.3107196.
A. Rodriguez, A. Otero, M. Platzner, and E. De la Torre, “Exploiting Hardware-Based Data-Parallel and Multithreading Models for Smart Edge Computing in Reconfigurable FPGAs,” IEEE Transactions on Computers, pp. 1–1, 2021, doi: 10.1109/tc.2021.3107196.
Rodriguez, Alfonso, et al. “Exploiting Hardware-Based Data-Parallel and Multithreading Models for Smart Edge Computing in Reconfigurable FPGAs.” IEEE Transactions on Computers, Institute of Electrical and Electronics Engineers (IEEE), 2021, pp. 1–1, doi:10.1109/tc.2021.3107196.
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