A Formal Definition of an Abstract VHDL'93 Simulator by EA-Machines
E. Börger, U. Glässer, W. Müller, in: C. Delgado Kloos, P.T. Breuer (Eds.), Semantics of VHDL, Kluwer Academic Publishers, Dordrecht, 1995, pp. 107–139.
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Book Chapter
| English
Author
Börger, Egon;
Glässer, Uwe;
Müller, WolfgangLibreCat
Book Editor
Delgado Kloos, C.;
Breuer, Peter T.
Abstract
We present a rigorous but transparent semantic definition for VHDL corresponding to the IEEE VHDL’ 93 standard [68, 9, 84]. Our definition covers the full behavior of signal and variable assignments as well as the behavior of the various wait statements including delta, time, and postponed cycles. We consider explicitly declared signals, ports, local variables, and shared variables. Our specification defines an abstract VHDL ’ 93 interpreter in the form of transition rules for an evolving algebra machine (EA-Machine) [60]. It faithfully reflects and supports the view of simulation given in the IEEE VHDL ’ 93 standard language reference manual. The definition can be understood without any prior formal training. We illustrate our definition by running the example VHDL program set out in the Introduction to this volume.
Publishing Year
Book Title
Semantics of VHDL
Page
107 - 139
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LibreCat-ID
Cite this
Börger E, Glässer U, Müller W. A Formal Definition of an Abstract VHDL’93 Simulator by EA-Machines. In: Delgado Kloos C, Breuer PT, eds. Semantics of VHDL. Kluwer Academic Publishers; 1995:107-139. doi:10.1007/978-1-4615-2237-9_5
Börger, E., Glässer, U., & Müller, W. (1995). A Formal Definition of an Abstract VHDL’93 Simulator by EA-Machines. In C. Delgado Kloos & P. T. Breuer (Eds.), Semantics of VHDL (pp. 107–139). Kluwer Academic Publishers. https://doi.org/10.1007/978-1-4615-2237-9_5
@inbook{Börger_Glässer_Müller_1995, place={Dordrecht}, title={A Formal Definition of an Abstract VHDL’93 Simulator by EA-Machines}, DOI={10.1007/978-1-4615-2237-9_5}, booktitle={Semantics of VHDL}, publisher={Kluwer Academic Publishers}, author={Börger, Egon and Glässer, Uwe and Müller, Wolfgang}, editor={Delgado Kloos, C. and Breuer, Peter T.}, year={1995}, pages={107–139} }
Börger, Egon, Uwe Glässer, and Wolfgang Müller. “A Formal Definition of an Abstract VHDL’93 Simulator by EA-Machines.” In Semantics of VHDL, edited by C. Delgado Kloos and Peter T. Breuer, 107–39. Dordrecht: Kluwer Academic Publishers, 1995. https://doi.org/10.1007/978-1-4615-2237-9_5.
E. Börger, U. Glässer, and W. Müller, “A Formal Definition of an Abstract VHDL’93 Simulator by EA-Machines,” in Semantics of VHDL, C. Delgado Kloos and P. T. Breuer, Eds. Dordrecht: Kluwer Academic Publishers, 1995, pp. 107–139.
Börger, Egon, et al. “A Formal Definition of an Abstract VHDL’93 Simulator by EA-Machines.” Semantics of VHDL, edited by C. Delgado Kloos and Peter T. Breuer, Kluwer Academic Publishers, 1995, pp. 107–39, doi:10.1007/978-1-4615-2237-9_5.
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