Floating gate structures as nonvolatile analog memory cells in 1.0μm-LOCOS-CMOS technology with PZT dielectrica
A. Soennecken, U. Hilleringmann, K. Goser, Microelectronic Engineering 15 (2002) 633–636.
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Journal Article
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| English
Author
Soennecken, A.;
Hilleringmann, UlrichLibreCat;
Goser, K.
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Journal Title
Microelectronic Engineering
Volume
15
Issue
1-4
Page
633-636
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Soennecken A, Hilleringmann U, Goser K. Floating gate structures as nonvolatile analog memory cells in 1.0μm-LOCOS-CMOS technology with PZT dielectrica. Microelectronic Engineering. 2002;15(1-4):633-636. doi:10.1016/0167-9317(91)90299-s
Soennecken, A., Hilleringmann, U., & Goser, K. (2002). Floating gate structures as nonvolatile analog memory cells in 1.0μm-LOCOS-CMOS technology with PZT dielectrica. Microelectronic Engineering, 15(1–4), 633–636. https://doi.org/10.1016/0167-9317(91)90299-s
@article{Soennecken_Hilleringmann_Goser_2002, title={Floating gate structures as nonvolatile analog memory cells in 1.0μm-LOCOS-CMOS technology with PZT dielectrica}, volume={15}, DOI={10.1016/0167-9317(91)90299-s}, number={1–4}, journal={Microelectronic Engineering}, publisher={Elsevier BV}, author={Soennecken, A. and Hilleringmann, Ulrich and Goser, K.}, year={2002}, pages={633–636} }
Soennecken, A., Ulrich Hilleringmann, and K. Goser. “Floating Gate Structures as Nonvolatile Analog Memory Cells in 1.0μm-LOCOS-CMOS Technology with PZT Dielectrica.” Microelectronic Engineering 15, no. 1–4 (2002): 633–36. https://doi.org/10.1016/0167-9317(91)90299-s.
A. Soennecken, U. Hilleringmann, and K. Goser, “Floating gate structures as nonvolatile analog memory cells in 1.0μm-LOCOS-CMOS technology with PZT dielectrica,” Microelectronic Engineering, vol. 15, no. 1–4, pp. 633–636, 2002, doi: 10.1016/0167-9317(91)90299-s.
Soennecken, A., et al. “Floating Gate Structures as Nonvolatile Analog Memory Cells in 1.0μm-LOCOS-CMOS Technology with PZT Dielectrica.” Microelectronic Engineering, vol. 15, no. 1–4, Elsevier BV, 2002, pp. 633–36, doi:10.1016/0167-9317(91)90299-s.
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