Analysis of Phase Noise in Waveguide-integrated Optical Test Structures in Silicon Photonics

V. Surendranath Shroff, C. Kress, M. Bahmanian, J.C. Scheytt, in: 2023 PhotonIcs & Electromagnetics Research Symposium (PIERS), , IEEE, 2023.

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Abstract
This paper experimentally investigates and interprets the e®ects of noise and non- linearity in a silicon photonic optical test structure. For the analysis di®erent optoelectronic phase noise measurement techniques are used. Our tests focuses on the performance of integrated opti- cal test structures using femtosecond pulses in the 1550nm spectral range. A primary objective is to understand the behaviour of silicon photonic waveguides that can be further employed in the implementation of an optoelectronic phase-locked loop (OEPLL) in silicon photonics technology. A comparison of our results, as well as a discussion on the di®erent optoelectronic phase noise measurement techniques are presented. Our ¯ndings provide insights that can be leveraged to optimize the design and performance of ultra-low phase noise on-chip OEPLL systems locking to mode-locked laser (MLL) signals. In the future such systems can be essential for advanced communication and sensing applications.
Publishing Year
Proceedings Title
2023 PhotonIcs & Electromagnetics Research Symposium (PIERS),
Conference
2023 PhotonIcs & Electromagnetics Research Symposium (PIERS)
Conference Location
Prague, Czech Republic
Conference Date
2023-07-03 – 2023-07-06
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Surendranath Shroff V, Kress C, Bahmanian M, Scheytt JC. Analysis of Phase Noise in Waveguide-integrated Optical Test Structures in Silicon Photonics. In: 2023 PhotonIcs & Electromagnetics Research Symposium (PIERS), . IEEE; 2023. doi:10.1109/PIERS59004.2023.10221473
Surendranath Shroff, V., Kress, C., Bahmanian, M., & Scheytt, J. C. (2023). Analysis of Phase Noise in Waveguide-integrated Optical Test Structures in Silicon Photonics. 2023 PhotonIcs & Electromagnetics Research Symposium (PIERS), . 2023 PhotonIcs & Electromagnetics Research Symposium (PIERS), Prague, Czech Republic. https://doi.org/10.1109/PIERS59004.2023.10221473
@inproceedings{Surendranath Shroff_Kress_Bahmanian_Scheytt_2023, title={Analysis of Phase Noise in Waveguide-integrated Optical Test Structures in Silicon Photonics}, DOI={10.1109/PIERS59004.2023.10221473}, booktitle={2023 PhotonIcs & Electromagnetics Research Symposium (PIERS), }, publisher={IEEE}, author={Surendranath Shroff, Vijayalakshmi and Kress, Christian and Bahmanian, Meysam and Scheytt, J. Christoph}, year={2023} }
Surendranath Shroff, Vijayalakshmi, Christian Kress, Meysam Bahmanian, and J. Christoph Scheytt. “Analysis of Phase Noise in Waveguide-Integrated Optical Test Structures in Silicon Photonics.” In 2023 PhotonIcs & Electromagnetics Research Symposium (PIERS), . IEEE, 2023. https://doi.org/10.1109/PIERS59004.2023.10221473.
V. Surendranath Shroff, C. Kress, M. Bahmanian, and J. C. Scheytt, “Analysis of Phase Noise in Waveguide-integrated Optical Test Structures in Silicon Photonics,” presented at the 2023 PhotonIcs & Electromagnetics Research Symposium (PIERS), Prague, Czech Republic, 2023, doi: 10.1109/PIERS59004.2023.10221473.
Surendranath Shroff, Vijayalakshmi, et al. “Analysis of Phase Noise in Waveguide-Integrated Optical Test Structures in Silicon Photonics.” 2023 PhotonIcs & Electromagnetics Research Symposium (PIERS), , IEEE, 2023, doi:10.1109/PIERS59004.2023.10221473.

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