Swift Synthesis of Approximate Hardware Accelerators Using Generative Adversarial Networks

M. Awais, H.G. Mohammadi, M. Platzner, in: 2025 IFIP/IEEE 33rd International Conference on Very Large Scale Integration (VLSI-SoC), IEEE, 2026.

Download
No fulltext has been uploaded.
Conference Paper | Published | English
Author
Awais, Muhammad; Mohammadi, Hassan Ghasemzadeh; Platzner, Marco
Publishing Year
Proceedings Title
2025 IFIP/IEEE 33rd International Conference on Very Large Scale Integration (VLSI-SoC)
LibreCat-ID

Cite this

Awais M, Mohammadi HG, Platzner M. Swift Synthesis of Approximate Hardware Accelerators Using Generative Adversarial Networks. In: 2025 IFIP/IEEE 33rd International Conference on Very Large Scale Integration (VLSI-SoC). IEEE; 2026. doi:10.1109/vlsi-soc64688.2025.11421759
Awais, M., Mohammadi, H. G., & Platzner, M. (2026). Swift Synthesis of Approximate Hardware Accelerators Using Generative Adversarial Networks. 2025 IFIP/IEEE 33rd International Conference on Very Large Scale Integration (VLSI-SoC). https://doi.org/10.1109/vlsi-soc64688.2025.11421759
@inproceedings{Awais_Mohammadi_Platzner_2026, title={Swift Synthesis of Approximate Hardware Accelerators Using Generative Adversarial Networks}, DOI={10.1109/vlsi-soc64688.2025.11421759}, booktitle={2025 IFIP/IEEE 33rd International Conference on Very Large Scale Integration (VLSI-SoC)}, publisher={IEEE}, author={Awais, Muhammad and Mohammadi, Hassan Ghasemzadeh and Platzner, Marco}, year={2026} }
Awais, Muhammad, Hassan Ghasemzadeh Mohammadi, and Marco Platzner. “Swift Synthesis of Approximate Hardware Accelerators Using Generative Adversarial Networks.” In 2025 IFIP/IEEE 33rd International Conference on Very Large Scale Integration (VLSI-SoC). IEEE, 2026. https://doi.org/10.1109/vlsi-soc64688.2025.11421759.
M. Awais, H. G. Mohammadi, and M. Platzner, “Swift Synthesis of Approximate Hardware Accelerators Using Generative Adversarial Networks,” 2026, doi: 10.1109/vlsi-soc64688.2025.11421759.
Awais, Muhammad, et al. “Swift Synthesis of Approximate Hardware Accelerators Using Generative Adversarial Networks.” 2025 IFIP/IEEE 33rd International Conference on Very Large Scale Integration (VLSI-SoC), IEEE, 2026, doi:10.1109/vlsi-soc64688.2025.11421759.

Export

Marked Publications

Open Data LibreCat

Search this title in

Google Scholar